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Searched refs:CBCR_HW_CTL_ENABLE_BIT (Results 1 – 3 of 3) sorted by relevance

/optee_os/core/drivers/clk/qcom/
H A Dclock-qcom-pas.c22 #define CBCR_HW_CTL_ENABLE_BIT BIT(1) macro
64 io_setbits32(cc_base + TURING_Q6SS_Q6_AXIM_CLK, CBCR_HW_CTL_ENABLE_BIT); in compute_cc_enable()
65 io_setbits32(cc_base + TURING_CENG_CLK, CBCR_HW_CTL_ENABLE_BIT); in compute_cc_enable()
66 io_clrbits32(cc_base + TURING_NSPNOC_CLK, CBCR_HW_CTL_ENABLE_BIT); in compute_cc_enable()
H A Dclock-qcom.c15 #define CBCR_HW_CTL_ENABLE_BIT BIT(1) macro
/optee_os/core/pta/qcom/pas/
H A Ddsp.c15 #define CBCR_HW_CTL_ENABLE_BIT BIT(1) macro
35 CBCR_BRANCH_ENABLE_BIT | CBCR_HW_CTL_ENABLE_BIT); in dsp_fw_start()