Searched refs:slot0 (Results 1 – 13 of 13) sorted by relevance
73 brl->quad0.slot0 = NOP_M_INST; /* nop.m 0x0 */ in set_brl_inst()302 bundle->quad0.slot0 = break_inst; in prepare_break_inst()331 *major_opcode = (bundle->quad0.slot0 >> SLOT0_OPCODE_SHIFT); in get_kprobe_inst()332 *kprobe_inst = bundle->quad0.slot0; in get_kprobe_inst()546 dest->quad0.slot0 = src->quad0.slot0; in arch_arm_kprobe()569 dest->quad0.slot0 = src->quad0.slot0; in arch_disarm_kprobe()
518 int slot0 = 300, slot1 = 0; in iwlagn_set_pan_params() local566 slot0 = bcnint / 2; in iwlagn_set_pan_params()567 slot1 = bcnint - slot0; in iwlagn_set_pan_params()572 slot0 = dtim * bcnint * 3 - IWL_MIN_SLOT_TIME; in iwlagn_set_pan_params()577 slot0 = IWL_MIN_SLOT_TIME; in iwlagn_set_pan_params()580 slot0 = 0; in iwlagn_set_pan_params()586 slot0 = slot1 * 3 - IWL_MIN_SLOT_TIME; in iwlagn_set_pan_params()591 cmd.slots[0].width = cpu_to_le16(slot0); in iwlagn_set_pan_params()
53 unsigned long long slot0 : 41; member
18 /* clk already mux wuth slot0 */
17 /* clk already mux wuth slot0 */
867 struct fsl_easrc_slot *slot0, *slot1; in fsl_easrc_config_slot() local875 slot0 = &easrc_priv->slot[i][0]; in fsl_easrc_config_slot()878 if (slot0->busy && slot1->busy) { in fsl_easrc_config_slot()880 } else if ((slot0->busy && slot0->ctx_index == ctx->index) || in fsl_easrc_config_slot()883 } else if (!slot0->busy) { in fsl_easrc_config_slot()884 slota = slot0; in fsl_easrc_config_slot()889 slotb = slot0; in fsl_easrc_config_slot()
1097 after slot0 reservation for a VLIW processor. We could describe it1100 (presence_set "slot1" "slot0")1102 Or slot1 is reserved only after slot0 and unit b0 reservation. In1105 (presence_set "slot1" "slot0 b0")1122 (presence_set "slot1" "slot0")1125 slot0 which is absent in the source state).1127 (define_reservation "insn_and_nop" "slot0 + slot1")1140 For example, it is useful for description that slot0 cannot be1144 (absence_set "slot2" "slot0, slot1")1146 Or slot2 cannot be reserved if slot0 and unit b0 are reserved or[all …]
842 int *slot0 = &n->active_links[0]; in __tipc_node_link_up() local873 *slot0 = bearer_id; in __tipc_node_link_up()885 *slot0 = bearer_id; in __tipc_node_link_up()968 int *slot0 = &n->active_links[0]; in __tipc_node_link_down() local987 *slot0 = INVALID_BEARER_ID; in __tipc_node_link_down()1000 *slot0 = i; in __tipc_node_link_down()
286 /* IDSEL 4 -- slot0, 26/28 A/B IRQ1/3 */
119 SW2=xxxxxx00 PCI SLOT INFORM: The CDS carrier is in slot0 of the Arcadia
29849 that VLIW 'slot1' is reserved after 'slot0' reservation. We could29852 (presence_set "slot1" "slot0")29854 Or 'slot1' is reserved only after 'slot0' and unit 'b0' reservation.29857 (presence_set "slot1" "slot0 b0")29869 (presence_set "slot1" "slot0")29872 'slot0' which is absent in the source state).29874 (define_reservation "insn_and_nop" "slot0 + slot1")29883 that 'slot0' cannot be reserved after either 'slot1' or 'slot2' have29886 (absence_set "slot0" "slot1, slot2")29888 Or 'slot2' cannot be reserved if 'slot0' and unit 'b0' are reserved or[all …]