xref: /OK3568_Linux_fs/u-boot/doc/README.mpc85xxcds (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593SmuzhiyunMotorola MPC85xxCDS boards
2*4882a593Smuzhiyun--------------------------
3*4882a593Smuzhiyun
4*4882a593SmuzhiyunThe CDS family of boards consists of a PCI backplane called the
5*4882a593Smuzhiyun"Arcadia", a PCI-form-factor carrier card that plugs into a PCI slot,
6*4882a593Smuzhiyunand a CPU daughter card that bolts onto the daughter card.
7*4882a593Smuzhiyun
8*4882a593SmuzhiyunMuch of the content of the README.mpc85xxads for the 85xx ADS boards
9*4882a593Smuzhiyunapplies to the 85xx CDS boards as well.	 In particular the toolchain,
10*4882a593Smuzhiyunthe switch nomenclature, and the basis for the memory map.  There are
11*4882a593Smuzhiyunsome differences, though.
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun
14*4882a593SmuzhiyunBuilding U-Boot
15*4882a593Smuzhiyun---------------
16*4882a593Smuzhiyun
17*4882a593SmuzhiyunThe Binutils in current ELDK toolchain will not support MPC85xx
18*4882a593Smuzhiyunchip.  You need to use binutils-2.14.tar.bz2 (or newer) from
19*4882a593Smuzhiyun    http://ftp.gnu.org/gnu/binutils.
20*4882a593Smuzhiyun
21*4882a593SmuzhiyunThe 85xx CDS code base is known to compile using:
22*4882a593Smuzhiyun    gcc (GCC) 3.2.2 20030217 (Yellow Dog Linux 3.0 3.2.2-2a)
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun
25*4882a593SmuzhiyunMemory Map
26*4882a593Smuzhiyun----------
27*4882a593Smuzhiyun
28*4882a593SmuzhiyunThe memory map for U-Boot and linux has been extended w.r.t. the ADS
29*4882a593Smuzhiyunplatform to allow for utilization of all 85xx CDS devices.  The memory
30*4882a593Smuzhiyunmap is setup for linux to operate properly.  The linux source when
31*4882a593Smuzhiyunconfigured for MPC85xx CDS has been updated to reflect the new memory
32*4882a593Smuzhiyunmap.
33*4882a593Smuzhiyun
34*4882a593SmuzhiyunThe mapping is:
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun   0x0000_0000	   0x7fff_ffff	   DDR			   2G
37*4882a593Smuzhiyun   0x8000_0000	   0x9fff_ffff	   PCI1 MEM		   512M
38*4882a593Smuzhiyun   0xa000_0000	   0xbfff_ffff	   PCI2 MEM		   512M
39*4882a593Smuzhiyun   0xe000_0000	   0xe00f_ffff	   CCSR			   1M
40*4882a593Smuzhiyun   0xe200_0000	   0xe2ff_ffff	   PCI1 IO		   16M
41*4882a593Smuzhiyun   0xe300_0000	   0xe3ff_ffff	   PCI2 IO		   16M
42*4882a593Smuzhiyun   0xf000_0000	   0xf7ff_ffff	   SDRAM		   128M
43*4882a593Smuzhiyun   0xf800_0000	   0xf80f_ffff	   NVRAM/CADMUS (*)	   1M
44*4882a593Smuzhiyun   0xff00_0000	   0xff7f_ffff	   FLASH (2nd bank)	   8M
45*4882a593Smuzhiyun   0xff80_0000	   0xffff_ffff	   FLASH (boot bank)	   8M
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun   (*) The system control registers (CADMUS) start at offset 0xfdb0_4000
48*4882a593Smuzhiyun   within the NVRAM/CADMUS region of memory.
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun
51*4882a593SmuzhiyunUsing Flash
52*4882a593Smuzhiyun-----------
53*4882a593Smuzhiyun
54*4882a593SmuzhiyunThe CDS board  has two flash banks, each 8MB in size (2^23 = 0x00800000).
55*4882a593SmuzhiyunThere is a switch which allows the boot-bank to be selected.  The switch
56*4882a593Smuzhiyunsettings for updating flash are given below.
57*4882a593Smuzhiyun
58*4882a593SmuzhiyunThe U-Boot commands for copying the boot-bank into the secondary bank are
59*4882a593Smuzhiyunas follows:
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun     erase ff780000 ff7fffff
62*4882a593Smuzhiyun     cp.b fff80000 ff780000 80000
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun
65*4882a593SmuzhiyunU-Boot/kermit commands for downloading an image, then copying
66*4882a593Smuzhiyunit into the secondary bank:
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun     loadb
69*4882a593Smuzhiyun     [Drop to kermit:
70*4882a593Smuzhiyun	^\c
71*4882a593Smuzhiyun	send <u-boot-bin-image>
72*4882a593Smuzhiyun	c
73*4882a593Smuzhiyun     ]
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun     erase ff780000 ff7fffff
76*4882a593Smuzhiyun     cp.b $loadaddr ff780000 80000
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun
79*4882a593SmuzhiyunU-Boot commands for downloading an image via tftp and flashing
80*4882a593Smuzhiyunit into the second bank:
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun     tftp 10000 <u-boot.bin.image>
83*4882a593Smuzhiyun     erase ff780000 ff7fffff
84*4882a593Smuzhiyun     cp.b 10000 ff780000 80000
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun
87*4882a593SmuzhiyunAfter copying the image into the second bank of flash, be sure to toggle
88*4882a593SmuzhiyunSW2[2] on the carrier card before resetting the board in order to set the
89*4882a593Smuzhiyunsecondary bank as the boot-bank.
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun
92*4882a593SmuzhiyunCarrier Board Switches
93*4882a593Smuzhiyun----------------------
94*4882a593Smuzhiyun
95*4882a593SmuzhiyunAs a reminder, you should read the README.mpc85xxads too.
96*4882a593Smuzhiyun
97*4882a593SmuzhiyunMost switches on the carrier board should not be changed.  The only
98*4882a593Smuzhiyunuser-settable switches on the carrier board are used to configure
99*4882a593Smuzhiyunthe flash banks and determining the PCI slot.
100*4882a593Smuzhiyun
101*4882a593SmuzhiyunThe first two bits of SW2 control how flash is used on the board:
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun      12345678
104*4882a593Smuzhiyun      --------
105*4882a593Smuzhiyun  SW2=00XXXXXX	   FLASH:  Boot bank 1, bank 2 available.
106*4882a593Smuzhiyun      01XXXXXX	   FLASH:  Boot bank 2, bank 1 available (swapped).
107*4882a593Smuzhiyun      10XXXXXX	   FLASH:  Boot promjet, bank 1 available
108*4882a593Smuzhiyun      11XXXXXX	   FLASH:  Boot promjet, bank 2 available
109*4882a593Smuzhiyun
110*4882a593SmuzhiyunThe boot bank is always mapped to FF80_0000 and listed first by
111*4882a593Smuzhiyunthe "flinfo" command.  The secondary bank is always FF00_0000.
112*4882a593Smuzhiyun
113*4882a593SmuzhiyunWhen using PCI, linux needs to know to which slot the CDS carrier is
114*4882a593Smuzhiyunconnected..  By convention, the user-specific bits of SW2 are used to
115*4882a593Smuzhiyunconvey this information:
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun      12345678
118*4882a593Smuzhiyun      --------
119*4882a593Smuzhiyun  SW2=xxxxxx00	   PCI SLOT INFORM: The CDS carrier is in slot0 of the Arcadia
120*4882a593Smuzhiyun      xxxxxx01	   PCI SLOT INFORM: The CDS carrier is in slot1 of the Arcadia
121*4882a593Smuzhiyun      xxxxxx10	   PCI SLOT INFORM: The CDS carrier is in slot2 of the Arcadia
122*4882a593Smuzhiyun      xxxxxx11	   PCI SLOT INFORM: The CDS carrier is in slot3 of the Arcadia
123*4882a593Smuzhiyun
124*4882a593SmuzhiyunThese are cleverly, er, clearly silkscreened as Slot 1 through 4,
125*4882a593Smuzhiyunrespectively, on the Arcadia near the support posts.
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun
128*4882a593SmuzhiyunThe default setting of all switches on the carrier board is:
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun      12345678
131*4882a593Smuzhiyun      --------
132*4882a593Smuzhiyun  SW1=01101100
133*4882a593Smuzhiyun  SW2=0x1111yy	   x=Flash bank, yy=PCI slot
134*4882a593Smuzhiyun  SW3=11101111
135*4882a593Smuzhiyun  SW4=10001000
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun8555/41 CPU Card Switches
139*4882a593Smuzhiyun-------------------------
140*4882a593Smuzhiyun
141*4882a593SmuzhiyunMost switches on the CPU Card should not be changed.  However, the
142*4882a593Smuzhiyunfrequency can be changed by setting SW3:
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun      12345678
145*4882a593Smuzhiyun      --------
146*4882a593Smuzhiyun  SW3=XX00XXXX == CORE:CCB 2:1
147*4882a593Smuzhiyun      XX01XXXX == CORE:CCB 5:2
148*4882a593Smuzhiyun      XX10XXXX == CORE:CCB 3:1
149*4882a593Smuzhiyun      XX11XXXX == CORE:CCB 7:2
150*4882a593Smuzhiyun      XXXX1000 == CCB:SYSCLK 8:1
151*4882a593Smuzhiyun      XXXX1010 == CCB:SYSCLK 10:1
152*4882a593Smuzhiyun
153*4882a593SmuzhiyunA safe default setting for all switches on the CPU board is:
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun      12345678
156*4882a593Smuzhiyun      --------
157*4882a593Smuzhiyun  SW1=10001111
158*4882a593Smuzhiyun  SW2=01000111
159*4882a593Smuzhiyun  SW3=00001000
160*4882a593Smuzhiyun  SW4=11111110
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun8548 CPU Card Switches
164*4882a593Smuzhiyun----------------------
165*4882a593SmuzhiyunAnd, just to be confusing, in this set of switches:
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun    ON  = 1
168*4882a593Smuzhiyun    OFF = 0
169*4882a593Smuzhiyun
170*4882a593SmuzhiyunDefault
171*4882a593Smuzhiyun  SW1=11111101
172*4882a593Smuzhiyun  SW2=10011111
173*4882a593Smuzhiyun  SW3=11001000    (8X) (2:1)
174*4882a593Smuzhiyun  SW4=11110011
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun  SW3=X000XXXX  == CORE:CCB    4:1
177*4882a593Smuzhiyun      X001XXXX  == CORE:CCB    9:2
178*4882a593Smuzhiyun      X010XXXX  == CORE:CCB    1:1
179*4882a593Smuzhiyun      X011XXXX  == CORE:CCB    3:2
180*4882a593Smuzhiyun      X100XXXX  == CORE:CCB    2:1
181*4882a593Smuzhiyun      X101XXXX  == CORE:CCB    5:2
182*4882a593Smuzhiyun      X110XXXX  == CORE:CCB    3:1
183*4882a593Smuzhiyun      X111XXXX  == CORE:CCB    7:2
184*4882a593Smuzhiyun      XXXX0000  == CCB:SYSCLK 16:1
185*4882a593Smuzhiyun      XXXX0001  == RESERVED
186*4882a593Smuzhiyun      XXXX0010  == CCB:SYSCLK  2:1
187*4882a593Smuzhiyun      XXXX0011  == CCB:SYSCLK  3:1
188*4882a593Smuzhiyun      XXXX0100  == CCB:SYSCLK  4:1
189*4882a593Smuzhiyun      XXXX0101  == CCB:SYSCLK  5:1
190*4882a593Smuzhiyun      XXXX0110  == CCB:SYSCLK  6:1
191*4882a593Smuzhiyun      XXXX0111  == RESERVED
192*4882a593Smuzhiyun      XXXX1000  == CCB:SYSCLK  8:1
193*4882a593Smuzhiyun      XXXX1001  == CCB:SYSCLK  9:1
194*4882a593Smuzhiyun      XXXX1010  == CCB:SYSCLK 10:1
195*4882a593Smuzhiyun      XXXX1011  == RESERVED
196*4882a593Smuzhiyun      XXXX1100  == CCB:SYSCLK 12:1
197*4882a593Smuzhiyun      XXXX1101  == CCB:SYSCLK 20:1
198*4882a593Smuzhiyun      XXXX1110  == RESERVED
199*4882a593Smuzhiyun      XXXX1111  == RESERVED
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun
202*4882a593SmuzhiyuneDINK Info
203*4882a593Smuzhiyun----------
204*4882a593Smuzhiyun
205*4882a593SmuzhiyunOne bank of flash may contain an eDINK image.
206*4882a593Smuzhiyun
207*4882a593SmuzhiyunMemory Map:
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun   CCSRBAR @ 0xe0000000
210*4882a593Smuzhiyun   Flash Bank 1 @ 0xfe000000
211*4882a593Smuzhiyun   Flash Bank 2 @ 0xff000000
212*4882a593Smuzhiyun   Ram @ 0
213*4882a593Smuzhiyun
214*4882a593SmuzhiyunCommands for downloading a U-Boot image to memory from edink:
215*4882a593Smuzhiyun
216*4882a593Smuzhiyun   env -c
217*4882a593Smuzhiyun   time -s 4/8/2004 4:30p
218*4882a593Smuzhiyun   dl -k -b -o 100000
219*4882a593Smuzhiyun   [Drop to kermit:
220*4882a593Smuzhiyun	^\c
221*4882a593Smuzhiyun	transmit /binary <u-boot-bin-image>
222*4882a593Smuzhiyun	c
223*4882a593Smuzhiyun   ]
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun   fu -l 100000 fe780000 80000
226