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Searched refs:rc_dthd_0_8 (Results 1 – 8 of 8) sorted by relevance

/OK3568_Linux_fs/external/mpp/mpp/hal/rkenc/h264e/
H A Dhal_h264e_vepu540c.c1011 regs->reg_rc_roi.rc_dthd_0_8[0] = negative_bits_thd; in setup_vepu540c_rc_base()
1012 regs->reg_rc_roi.rc_dthd_0_8[1] = positive_bits_thd; in setup_vepu540c_rc_base()
1013 regs->reg_rc_roi.rc_dthd_0_8[2] = positive_bits_thd; in setup_vepu540c_rc_base()
1014 regs->reg_rc_roi.rc_dthd_0_8[3] = positive_bits_thd; in setup_vepu540c_rc_base()
1015 regs->reg_rc_roi.rc_dthd_0_8[4] = positive_bits_thd; in setup_vepu540c_rc_base()
1016 regs->reg_rc_roi.rc_dthd_0_8[5] = positive_bits_thd; in setup_vepu540c_rc_base()
1017 regs->reg_rc_roi.rc_dthd_0_8[6] = positive_bits_thd; in setup_vepu540c_rc_base()
1018 regs->reg_rc_roi.rc_dthd_0_8[7] = positive_bits_thd; in setup_vepu540c_rc_base()
1019 regs->reg_rc_roi.rc_dthd_0_8[8] = positive_bits_thd; in setup_vepu540c_rc_base()
H A Dhal_h264e_vepu580.c1366 regs->reg_rc_klut.rc_dthd_0_8[0] = 4 * negative_bits_thd; in setup_vepu580_rc_base()
1367 regs->reg_rc_klut.rc_dthd_0_8[1] = negative_bits_thd; in setup_vepu580_rc_base()
1368 regs->reg_rc_klut.rc_dthd_0_8[2] = positive_bits_thd; in setup_vepu580_rc_base()
1369 regs->reg_rc_klut.rc_dthd_0_8[3] = 4 * positive_bits_thd; in setup_vepu580_rc_base()
1370 regs->reg_rc_klut.rc_dthd_0_8[4] = 0x7FFFFFFF; in setup_vepu580_rc_base()
1371 regs->reg_rc_klut.rc_dthd_0_8[5] = 0x7FFFFFFF; in setup_vepu580_rc_base()
1372 regs->reg_rc_klut.rc_dthd_0_8[6] = 0x7FFFFFFF; in setup_vepu580_rc_base()
1373 regs->reg_rc_klut.rc_dthd_0_8[7] = 0x7FFFFFFF; in setup_vepu580_rc_base()
1374 regs->reg_rc_klut.rc_dthd_0_8[8] = 0x7FFFFFFF; in setup_vepu580_rc_base()
H A Dhal_h264e_vepu540c_reg.h726 RK_U32 rc_dthd_0_8[9]; member
H A Dhal_h264e_vepu580_reg.h732 RK_U32 rc_dthd_0_8[9]; member
/OK3568_Linux_fs/external/mpp/mpp/hal/rkenc/h265e/
H A Dhal_h265e_vepu540c.c769 reg_rc->rc_dthd_0_8[0] = 2 * negative_bits_thd; in vepu540c_h265_set_rc_regs()
770 reg_rc->rc_dthd_0_8[1] = negative_bits_thd; in vepu540c_h265_set_rc_regs()
771 reg_rc->rc_dthd_0_8[2] = positive_bits_thd; in vepu540c_h265_set_rc_regs()
772 reg_rc->rc_dthd_0_8[3] = 2 * positive_bits_thd; in vepu540c_h265_set_rc_regs()
773 reg_rc->rc_dthd_0_8[4] = 0x7FFFFFFF; in vepu540c_h265_set_rc_regs()
774 reg_rc->rc_dthd_0_8[5] = 0x7FFFFFFF; in vepu540c_h265_set_rc_regs()
775 reg_rc->rc_dthd_0_8[6] = 0x7FFFFFFF; in vepu540c_h265_set_rc_regs()
776 reg_rc->rc_dthd_0_8[7] = 0x7FFFFFFF; in vepu540c_h265_set_rc_regs()
777 reg_rc->rc_dthd_0_8[8] = 0x7FFFFFFF; in vepu540c_h265_set_rc_regs()
H A Dhal_h265e_vepu580.c1854 reg_rc->rc_dthd_0_8[0] = 2 * negative_bits_thd; in vepu580_h265_set_rc_regs()
1855 reg_rc->rc_dthd_0_8[1] = negative_bits_thd; in vepu580_h265_set_rc_regs()
1856 reg_rc->rc_dthd_0_8[2] = positive_bits_thd; in vepu580_h265_set_rc_regs()
1857 reg_rc->rc_dthd_0_8[3] = 2 * positive_bits_thd; in vepu580_h265_set_rc_regs()
1858 reg_rc->rc_dthd_0_8[4] = 0x7FFFFFFF; in vepu580_h265_set_rc_regs()
1859 reg_rc->rc_dthd_0_8[5] = 0x7FFFFFFF; in vepu580_h265_set_rc_regs()
1860 reg_rc->rc_dthd_0_8[6] = 0x7FFFFFFF; in vepu580_h265_set_rc_regs()
1861 reg_rc->rc_dthd_0_8[7] = 0x7FFFFFFF; in vepu580_h265_set_rc_regs()
1862 reg_rc->rc_dthd_0_8[8] = 0x7FFFFFFF; in vepu580_h265_set_rc_regs()
H A Dhal_h265e_vepu540c_reg.h874 RK_U32 rc_dthd_0_8[9]; member
H A Dhal_h265e_vepu580_reg.h751 RK_U32 rc_dthd_0_8[9]; member