Searched refs:pll_con1 (Results 1 – 2 of 2) sorted by relevance
| /OK3568_Linux_fs/u-boot/drivers/clk/exynos/ |
| H A D | clk-pll.c | 22 unsigned long pll_con1 = readl(con1); in pll145x_get_rate() local
26 mdiv = (pll_con1 >> PLL145X_MDIV_SHIFT) & PLL145X_MDIV_MASK; in pll145x_get_rate()
27 pdiv = (pll_con1 >> PLL145X_PDIV_SHIFT) & PLL145X_PDIV_MASK; in pll145x_get_rate()
28 sdiv = (pll_con1 >> PLL145X_SDIV_SHIFT) & PLL145X_SDIV_MASK; in pll145x_get_rate()
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| /OK3568_Linux_fs/kernel/drivers/clk/samsung/ |
| H A D | clk-pll.c | 286 u32 mdiv, pdiv, sdiv, pll_con0, pll_con1; in samsung_pll36xx_recalc_rate() local
291 pll_con1 = readl_relaxed(pll->con_reg + 4); in samsung_pll36xx_recalc_rate()
295 kdiv = (s16)(pll_con1 & PLL36XX_KDIV_MASK); in samsung_pll36xx_recalc_rate()
305 const struct samsung_pll_rate_table *rate, u32 pll_con0, u32 pll_con1) in samsung_pll36xx_mpk_change() argument
311 old_kdiv = (pll_con1 >> PLL36XX_KDIV_SHIFT) & PLL36XX_KDIV_MASK; in samsung_pll36xx_mpk_change()
321 u32 tmp, pll_con0, pll_con1; in samsung_pll36xx_set_rate() local
332 pll_con1 = readl_relaxed(pll->con_reg + 4); in samsung_pll36xx_set_rate()
334 if (!(samsung_pll36xx_mpk_change(rate, pll_con0, pll_con1))) { in samsung_pll36xx_set_rate()
355 pll_con1 &= ~(PLL36XX_KDIV_MASK << PLL36XX_KDIV_SHIFT); in samsung_pll36xx_set_rate()
356 pll_con1 |= rate->kdiv << PLL36XX_KDIV_SHIFT; in samsung_pll36xx_set_rate()
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