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/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/
H A Dphydm.c36 struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void; in phydm_traffic_load_decision() local
41 if (p_dm->last_tx_ok_cnt > (*(p_dm->p_num_tx_bytes_unicast))) in phydm_traffic_load_decision()
42 p_dm->last_tx_ok_cnt = (*(p_dm->p_num_tx_bytes_unicast)); in phydm_traffic_load_decision()
44 if (p_dm->last_rx_ok_cnt > (*(p_dm->p_num_rx_bytes_unicast))) in phydm_traffic_load_decision()
45 p_dm->last_rx_ok_cnt = (*(p_dm->p_num_rx_bytes_unicast)); in phydm_traffic_load_decision()
47 p_dm->cur_tx_ok_cnt = *(p_dm->p_num_tx_bytes_unicast) - p_dm->last_tx_ok_cnt; in phydm_traffic_load_decision()
48 p_dm->cur_rx_ok_cnt = *(p_dm->p_num_rx_bytes_unicast) - p_dm->last_rx_ok_cnt; in phydm_traffic_load_decision()
49 p_dm->last_tx_ok_cnt = *(p_dm->p_num_tx_bytes_unicast); in phydm_traffic_load_decision()
50 p_dm->last_rx_ok_cnt = *(p_dm->p_num_rx_bytes_unicast); in phydm_traffic_load_decision()
55 p_dm->tx_tp = ((p_dm->tx_tp) >> 1) + (u32)(((p_dm->cur_tx_ok_cnt) >> bit_shift_num) >> 1); in phydm_traffic_load_decision()
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H A Dphydm_adaptivity.c33 struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void; in phydm_dig_up_bound_lmt_en() local
34 …ruct *p_adaptivity = (struct phydm_adaptivity_struct *)phydm_get_structure(p_dm, PHYDM_ADAPTIVITY); in phydm_dig_up_bound_lmt_en()
36 if (!(p_dm->support_ability & ODM_BB_ADAPTIVITY) || in phydm_dig_up_bound_lmt_en()
37 (p_dm->adaptivity_flag == false) || in phydm_dig_up_bound_lmt_en()
38 (!p_dm->is_linked) || in phydm_dig_up_bound_lmt_en()
39 (p_dm->adaptivity_enable == false) in phydm_dig_up_bound_lmt_en()
46 if (p_dm->total_tp > 1) { in phydm_dig_up_bound_lmt_en()
49 PHYDM_DBG(p_dm, DBG_ADPTVTY, in phydm_dig_up_bound_lmt_en()
58 PHYDM_DBG(p_dm, DBG_ADPTVTY, ("IGI_lmt_cnt = %d\n", p_adaptivity->igi_up_bound_lmt_cnt)); in phydm_dig_up_bound_lmt_en()
66 struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void; in phydm_check_adaptivity() local
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H A Dphydm_antdiv.c32 struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void; in odm_stop_antenna_switch_dm() local
34 p_dm->support_ability &= ~ODM_BB_ANT_DIV; in odm_stop_antenna_switch_dm()
35 odm_ant_div_on_off(p_dm, ANTDIV_OFF); in odm_stop_antenna_switch_dm()
36 odm_tx_by_tx_desc_or_reg(p_dm, TX_BY_REG); in odm_stop_antenna_switch_dm()
37 PHYDM_DBG(p_dm, DBG_ANT_DIV, ("STOP Antenna Diversity\n")); in odm_stop_antenna_switch_dm()
45 struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void; in phydm_enable_antenna_diversity() local
47 p_dm->support_ability |= ODM_BB_ANT_DIV; in phydm_enable_antenna_diversity()
48 p_dm->antdiv_select = 0; in phydm_enable_antenna_diversity()
49 PHYDM_DBG(p_dm, DBG_ANT_DIV, ("AntDiv is enabled & Re-Init AntDiv\n")); in phydm_enable_antenna_diversity()
50 odm_antenna_diversity_init(p_dm); in phydm_enable_antenna_diversity()
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H A Dphydm_antdect.c43 struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void; in odm_single_dual_antenna_default_setting() local
44 struct _sw_antenna_switch_ *p_dm_swat_table = &p_dm->dm_swat_table; in odm_single_dual_antenna_default_setting()
45 struct _ADAPTER *p_adapter = p_dm->adapter; in odm_single_dual_antenna_default_setting()
77 struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void; in odm_single_dual_antenna_detection() local
78 struct _ADAPTER *p_adapter = p_dm->adapter; in odm_single_dual_antenna_detection()
79 struct _sw_antenna_switch_ *p_dm_swat_table = &p_dm->dm_swat_table; in odm_single_dual_antenna_detection()
88 PHYDM_DBG(p_dm, DBG_ANT_DIV, ("odm_single_dual_antenna_detection()============>\n")); in odm_single_dual_antenna_detection()
91 if (!(p_dm->support_ic_type & ODM_RTL8723B)) in odm_single_dual_antenna_detection()
100 current_channel = odm_get_rf_reg(p_dm, RF_PATH_A, ODM_CHANNEL, RFREGOFFSETMASK); in odm_single_dual_antenna_detection()
101 rf_loop_reg = odm_get_rf_reg(p_dm, RF_PATH_A, 0x00, RFREGOFFSETMASK); in odm_single_dual_antenna_detection()
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H A Dphydm_dig.c28 struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void; in phydm_dig_go_up_check() local
29 struct _CCX_INFO *ccx_info = &p_dm->dm_ccx_info; in phydm_dig_go_up_check()
30 struct phydm_dig_struct *p_dig_t = &p_dm->dm_dig_table; in phydm_dig_go_up_check()
40 if (*p_dm->p_bb_op_mode == PHYDM_PERFORMANCE_MODE) in phydm_dig_go_up_check()
53 PHYDM_DBG(p_dm, DBG_DIG, ("check_lv = %d, max_cover_bond = 0x%x\n", in phydm_dig_go_up_check()
78 PHYDM_DBG(p_dm, DBG_DIG, in phydm_dig_go_up_check()
99 struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void; in odm_fa_threshold_check() local
100 struct phydm_dig_struct *p_dig_t = &p_dm->dm_dig_table; in odm_fa_threshold_check()
105 if (p_dm->is_linked && (is_performance || is_dfs_band)) { in odm_fa_threshold_check()
106 …if ((p_dm->rx_tp >> 2) > p_dm->tx_tp && p_dm->rx_tp < 10 && p_dm->rx_tp > 1) { /*10Mbps & 1Mbps*/ in odm_fa_threshold_check()
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H A Dphydm_api.c29 struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void; in phydm_init_trx_antenna_setting() local
31 if (p_dm->support_ic_type & (ODM_RTL8814A)) { in phydm_init_trx_antenna_setting()
34 rx_ant = (u8)odm_get_bb_reg(p_dm, ODM_REG(BB_RX_PATH, p_dm), ODM_BIT(BB_RX_PATH, p_dm)); in phydm_init_trx_antenna_setting()
35 tx_ant = (u8)odm_get_bb_reg(p_dm, ODM_REG(BB_TX_PATH, p_dm), ODM_BIT(BB_TX_PATH, p_dm)); in phydm_init_trx_antenna_setting()
36 p_dm->tx_ant_status = (tx_ant & 0xf); in phydm_init_trx_antenna_setting()
37 p_dm->rx_ant_status = (rx_ant & 0xf); in phydm_init_trx_antenna_setting()
38 …} else if (p_dm->support_ic_type & (ODM_RTL8723D | ODM_RTL8821C | ODM_RTL8710B)) {/* JJ ADD 201610… in phydm_init_trx_antenna_setting()
39 p_dm->tx_ant_status = 0x1; in phydm_init_trx_antenna_setting()
40 p_dm->rx_ant_status = 0x1; in phydm_init_trx_antenna_setting()
51 struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void; in phydm_config_ofdm_tx_path() local
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H A Dphydm_ccx.c25 struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void; in phydm_nhm_init() local
26 struct _CCX_INFO *ccx_info = &p_dm->dm_ccx_info; in phydm_nhm_init()
28 PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("[%s]===>\n", __FUNCTION__)); in phydm_nhm_init()
29 PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("cur_ig_value=0x%x\n", p_dm->dm_dig_table.cur_ig_value)); in phydm_nhm_init()
31 phydm_set_nhm_th_by_igi(p_dm, p_dm->dm_dig_table.cur_ig_value); in phydm_nhm_init()
37 phydm_nhm_setting(p_dm, SET_NHM_SETTING); in phydm_nhm_init()
45 struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void; in phydm_cal_nhm_cnt() local
46 struct _CCX_INFO *ccx_info = &p_dm->dm_ccx_info; in phydm_cal_nhm_cnt()
52 PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("[%s]===>\n", __FUNCTION__)); in phydm_cal_nhm_cnt()
54 if (!(p_dm->support_ability & ODM_BB_ENV_MONITOR)) in phydm_cal_nhm_cnt()
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H A Dphydm_noisemonitor.c46 s16 odm_inband_noise_monitor_n_series(struct PHY_DM_STRUCT *p_dm, u8 is_pause_dig, u8 igi_value, u3… in odm_inband_noise_monitor_n_series() argument
54 func_start = odm_get_current_time(p_dm); in odm_inband_noise_monitor_n_series()
55 p_dm->noise_level.noise_all = 0; in odm_inband_noise_monitor_n_series()
57 if ((p_dm->rf_type == RF_1T2R) || (p_dm->rf_type == RF_2T2R)) in odm_inband_noise_monitor_n_series()
62 PHYDM_DBG(p_dm, DBG_ENV_MNTR, ("odm_DebugControlInbandNoise_Nseries() ==>\n")); in odm_inband_noise_monitor_n_series()
64 odm_memory_set(p_dm, &noise_data, 0, sizeof(struct noise_level)); in odm_inband_noise_monitor_n_series()
68 odm_pause_dig(p_dm, PHYDM_PAUSE, PHYDM_PAUSE_LEVEL_1, igi_value); in odm_inband_noise_monitor_n_series()
71 start = odm_get_current_time(p_dm); in odm_inband_noise_monitor_n_series()
75 odm_set_bb_reg(p_dm, REG_FPGA0_TX_GAIN_STAGE, BIT(25), 1); in odm_inband_noise_monitor_n_series()
78 tmp4b = odm_get_bb_reg(p_dm, 0x8f8, MASKDWORD); in odm_inband_noise_monitor_n_series()
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H A Dphydm_pathdiv.c31 struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void; in phydm_dtp_fix_tx_path() local
32 struct _ODM_PATH_DIVERSITY_ *p_dm_path_div = &p_dm->dm_path_div; in phydm_dtp_fix_tx_path()
40 odm_set_bb_reg(p_dm, 0x93c, BIT(18) | BIT(19), 3); in phydm_dtp_fix_tx_path()
46 PHYDM_DBG(p_dm, DBG_PATH_DIV, (" number of turn-on path : (( %d ))\n", num_enable_path)); in phydm_dtp_fix_tx_path()
49 odm_set_bb_reg(p_dm, 0x93c, 0xf00000, path); in phydm_dtp_fix_tx_path()
52 PHYDM_DBG(p_dm, DBG_PATH_DIV, (" Turn on path (( A ))\n")); in phydm_dtp_fix_tx_path()
53 odm_set_bb_reg(p_dm, 0x93c, BIT(25) | BIT(24), 0); in phydm_dtp_fix_tx_path()
55 PHYDM_DBG(p_dm, DBG_PATH_DIV, (" Turn on path (( B ))\n")); in phydm_dtp_fix_tx_path()
56 odm_set_bb_reg(p_dm, 0x93c, BIT(27) | BIT(26), 0); in phydm_dtp_fix_tx_path()
58 PHYDM_DBG(p_dm, DBG_PATH_DIV, (" Turn on path (( C ))\n")); in phydm_dtp_fix_tx_path()
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H A Dphydm_dfs.c29 struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void; in phydm_dfs_is_meteorology_channel() local
31 u8 c_channel = *(p_dm->p_channel); in phydm_dfs_is_meteorology_channel()
32 u8 band_width = *(p_dm->p_band_width); in phydm_dfs_is_meteorology_channel()
41 struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void; in phydm_radar_detect_reset() local
43 odm_set_bb_reg(p_dm, 0x924, BIT(15), 0); in phydm_radar_detect_reset()
44 odm_set_bb_reg(p_dm, 0x924, BIT(15), 1); in phydm_radar_detect_reset()
49 struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void; in phydm_radar_detect_disable() local
51 odm_set_bb_reg(p_dm, 0x924, BIT(15), 0); in phydm_radar_detect_disable()
52 PHYDM_DBG(p_dm, DBG_DFS, ("\n")); in phydm_radar_detect_disable()
57 struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void; in phydm_radar_detect_with_dbg_parm() local
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H A Dphydm_hwconfig.c23 #define READ_AND_CONFIG_MP(ic, txt) (odm_read_and_config_mp_##ic##txt(p_dm))
24 #define READ_AND_CONFIG_TC(ic, txt) (odm_read_and_config_tc_##ic##txt(p_dm))
29 if (p_dm->is_mp_chip)\
42 #define GET_VERSION(ic, txt) (p_dm->is_mp_chip ? GET_VERSION_MP(ic, txt) : GET_VERSION_TC(ic, txt))
49 struct PHY_DM_STRUCT *p_dm, in odm_config_rf_with_header_file() argument
55 struct _ADAPTER *adapter = p_dm->adapter; in odm_config_rf_with_header_file()
60 PHYDM_DBG(p_dm, ODM_COMP_INIT, in odm_config_rf_with_header_file()
61 ("===>odm_config_rf_with_header_file (%s)\n", (p_dm->is_mp_chip) ? "MPChip" : "TestChip")); in odm_config_rf_with_header_file()
62 PHYDM_DBG(p_dm, ODM_COMP_INIT, in odm_config_rf_with_header_file()
64 p_dm->support_platform, p_dm->support_interface, p_dm->board_type)); in odm_config_rf_with_header_file()
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H A Dphydm_cck_pd.c32 struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void; in phydm_write_cck_cca_th_new_cs_ratio() local
33 struct phydm_cckpd_struct *p_cckpd_t = &p_dm->dm_cckpd_table; in phydm_write_cck_cca_th_new_cs_ratio()
35 PHYDM_DBG(p_dm, DBG_CCKPD, ("%s ======>\n", __func__)); in phydm_write_cck_cca_th_new_cs_ratio()
36 PHYDM_DBG(p_dm, DBG_CCKPD, ("[New] pd_th=0x%x, cs_ratio=0x%x\n\n", cca_th, cca_th_aaa)); in phydm_write_cck_cca_th_new_cs_ratio()
41 odm_set_bb_reg(p_dm, 0xa08, 0xf0000, cca_th); in phydm_write_cck_cca_th_new_cs_ratio()
49 odm_set_bb_reg(p_dm, 0xaa8, 0x1f0000, cca_th_aaa); in phydm_write_cck_cca_th_new_cs_ratio()
61 struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void; in phydm_write_cck_cca_th() local
62 struct phydm_cckpd_struct *p_cckpd_t = &p_dm->dm_cckpd_table; in phydm_write_cck_cca_th()
64 PHYDM_DBG(p_dm, DBG_CCKPD, ("%s ======>\n", __func__)); in phydm_write_cck_cca_th()
65 PHYDM_DBG(p_dm, DBG_CCKPD, ("New cck_cca_th=((0x%x))\n\n", cca_th)); in phydm_write_cck_cca_th()
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H A Dphydm_soml.c25 struct PHY_DM_STRUCT *p_dm in phydm_dynamicsoftmletting() argument
32 if (*(p_dm->p_mp_mode) == false) { in phydm_dynamicsoftmletting()
33 if (p_dm->support_ic_type & ODM_RTL8822B) { in phydm_dynamicsoftmletting()
35 if ((!p_dm->is_linked)|(p_dm->iot_table.is_linked_cmw500)) in phydm_dynamicsoftmletting()
38 if (true == p_dm->bsomlenabled) { in phydm_dynamicsoftmletting()
39 …PHYDM_DBG(p_dm, ODM_COMP_API, ("PHYDM_DynamicSoftMLSetting(): SoML has been enable, skip dynamic S… in phydm_dynamicsoftmletting()
43 ret_val = odm_get_bb_reg(p_dm, 0xf8c, MASKBYTE0); in phydm_dynamicsoftmletting()
44 PHYDM_DBG(p_dm, ODM_COMP_API, ("PHYDM_DynamicSoftMLSetting(): Read 0xF8C = 0x%08X\n", ret_val)); in phydm_dynamicsoftmletting()
47 …PHYDM_DBG(p_dm, ODM_COMP_API, ("PHYDM_DynamicSoftMLSetting(): 0xF8C(== 0x%08X) < 0x16, enable SoML… in phydm_dynamicsoftmletting()
48 phydm_somlrxhp_setting(p_dm, true); in phydm_dynamicsoftmletting()
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H A Dphydm_primary_cca.c30 struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void; in phydm_write_dynamic_cca() local
31 struct phydm_pricca_struct *primary_cca = &(p_dm->dm_pri_cca); in phydm_write_dynamic_cca()
35 if (p_dm->support_ic_type & ODM_IC_11N_SERIES) { in phydm_write_dynamic_cca()
38 odm_set_bb_reg(p_dm, 0xc6c, BIT(8) | BIT(7), MF_USC_LSC); in phydm_write_dynamic_cca()
39 …odm_set_bb_reg(p_dm, 0xc84, 0xf0000000, primary_cca->cca_th_40m_bkp); /*40M OFDM MF CCA threshold*/ in phydm_write_dynamic_cca()
41 odm_set_bb_reg(p_dm, 0xc6c, BIT(8) | BIT(7), curr_mf_state); in phydm_write_dynamic_cca()
42 odm_set_bb_reg(p_dm, 0xc84, 0xf0000000, 0); /*40M OFDM MF CCA threshold*/ in phydm_write_dynamic_cca()
47 PHYDM_DBG(p_dm, DBG_PRI_CCA, in phydm_write_dynamic_cca()
57 struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void; in phydm_primary_cca_reset() local
58 struct phydm_pricca_struct *primary_cca = &(p_dm->dm_pri_cca); in phydm_primary_cca_reset()
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/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/halrf/rtl8723b/
H A Dhalrf_8723b_win.c56 struct PHY_DM_STRUCT *p_dm, in halrf_rf_lna_setting_8723b() argument
63 odm_set_rf_reg(p_dm, RF_PATH_A, 0xef, 0x80000, 0x1); in halrf_rf_lna_setting_8723b()
64 odm_set_rf_reg(p_dm, RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ in halrf_rf_lna_setting_8723b()
65 odm_set_rf_reg(p_dm, RF_PATH_A, 0x31, 0xfffff, 0x0001f); in halrf_rf_lna_setting_8723b()
66 odm_set_rf_reg(p_dm, RF_PATH_A, 0x32, 0xfffff, 0xe6137); /*disable LNA*/ in halrf_rf_lna_setting_8723b()
67 odm_set_rf_reg(p_dm, RF_PATH_A, 0xef, 0x80000, 0x0); in halrf_rf_lna_setting_8723b()
69 odm_set_rf_reg(p_dm, RF_PATH_A, 0xed, 0x00020, 0x1); in halrf_rf_lna_setting_8723b()
70 odm_set_rf_reg(p_dm, RF_PATH_A, 0x43, 0xfffff, 0x3008d); /*select Rx mode and disable LNA*/ in halrf_rf_lna_setting_8723b()
71 odm_set_rf_reg(p_dm, RF_PATH_A, 0xed, 0x00020, 0x0); in halrf_rf_lna_setting_8723b()
75 odm_set_rf_reg(p_dm, RF_PATH_A, 0xef, 0x80000, 0x1); in halrf_rf_lna_setting_8723b()
[all …]
H A Dhalrf_8723b_ce.c52 struct PHY_DM_STRUCT *p_dm, in halrf_rf_lna_setting_8723b() argument
59 odm_set_rf_reg(p_dm, RF_PATH_A, 0xef, 0x80000, 0x1); in halrf_rf_lna_setting_8723b()
60 odm_set_rf_reg(p_dm, RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ in halrf_rf_lna_setting_8723b()
61 odm_set_rf_reg(p_dm, RF_PATH_A, 0x31, 0xfffff, 0x0001f); in halrf_rf_lna_setting_8723b()
62 odm_set_rf_reg(p_dm, RF_PATH_A, 0x32, 0xfffff, 0xe6137); /*disable LNA*/ in halrf_rf_lna_setting_8723b()
63 odm_set_rf_reg(p_dm, RF_PATH_A, 0xef, 0x80000, 0x0); in halrf_rf_lna_setting_8723b()
65 odm_set_rf_reg(p_dm, RF_PATH_A, 0xed, 0x00020, 0x1); in halrf_rf_lna_setting_8723b()
66 odm_set_rf_reg(p_dm, RF_PATH_A, 0x43, 0xfffff, 0x3008d); /*select Rx mode and disable LNA*/ in halrf_rf_lna_setting_8723b()
67 odm_set_rf_reg(p_dm, RF_PATH_A, 0xed, 0x00020, 0x0); in halrf_rf_lna_setting_8723b()
71 odm_set_rf_reg(p_dm, RF_PATH_A, 0xef, 0x80000, 0x1); in halrf_rf_lna_setting_8723b()
[all …]
H A Dhalrf_8723b_ap.c52 struct PHY_DM_STRUCT *p_dm, in halrf_rf_lna_setting_8723b() argument
59 odm_set_rf_reg(p_dm, RF_PATH_A, 0xef, 0x80000, 0x1); in halrf_rf_lna_setting_8723b()
60 odm_set_rf_reg(p_dm, RF_PATH_A, 0x30, 0xfffff, 0x18000); /*select Rx mode*/ in halrf_rf_lna_setting_8723b()
61 odm_set_rf_reg(p_dm, RF_PATH_A, 0x31, 0xfffff, 0x0001f); in halrf_rf_lna_setting_8723b()
62 odm_set_rf_reg(p_dm, RF_PATH_A, 0x32, 0xfffff, 0xe6137); /*disable LNA*/ in halrf_rf_lna_setting_8723b()
63 odm_set_rf_reg(p_dm, RF_PATH_A, 0xef, 0x80000, 0x0); in halrf_rf_lna_setting_8723b()
65 odm_set_rf_reg(p_dm, RF_PATH_A, 0xed, 0x00020, 0x1); in halrf_rf_lna_setting_8723b()
66 odm_set_rf_reg(p_dm, RF_PATH_A, 0x43, 0xfffff, 0x3008d); /*select Rx mode and disable LNA*/ in halrf_rf_lna_setting_8723b()
67 odm_set_rf_reg(p_dm, RF_PATH_A, 0xed, 0x00020, 0x0); in halrf_rf_lna_setting_8723b()
71 odm_set_rf_reg(p_dm, RF_PATH_A, 0xef, 0x80000, 0x1); in halrf_rf_lna_setting_8723b()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/halrf/
H A Dhalrf.c31 struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void; in halrf_basic_profile() local
52 struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void; in _iqk_page_switch() local
53 if (p_dm->support_ic_type == ODM_RTL8821C) in _iqk_page_switch()
54 odm_write_4byte(p_dm, 0x1b00, 0xf8000008); in _iqk_page_switch()
56 odm_write_4byte(p_dm, 0x1b00, 0xf800000a); in _iqk_page_switch()
110 struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void; in phydm_get_iqk_cfir() local
111 struct _IQK_INFORMATION *p_iqk_info = &p_dm->IQK_info; in phydm_get_iqk_cfir()
121 odm_set_bb_reg(p_dm, 0x1b00, MASKDWORD, 0xf8000008 | path << 1); in phydm_get_iqk_cfir()
123 odm_set_bb_reg(p_dm, 0x1b0c, BIT(13) | BIT(12), 0x3); in phydm_get_iqk_cfir()
125 odm_set_bb_reg(p_dm, 0x1b0c, BIT(13) | BIT(12), 0x1); in phydm_get_iqk_cfir()
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H A Dhalrf_kfree.c33 struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void; in phydm_set_kfree_to_rf_8814a() local
34 struct odm_rf_calibration_structure *p_rf_calibrate_info = &(p_dm->rf_calibrate_info); in phydm_set_kfree_to_rf_8814a()
39 odm_set_rf_reg(p_dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(19), 1); in phydm_set_kfree_to_rf_8814a()
42 odm_set_rf_reg(p_dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(19), 0); in phydm_set_kfree_to_rf_8814a()
45 …ODM_RT_TRACE(p_dm, ODM_COMP_MP, ODM_DBG_LOUD, ("phy_ConfigKFree8814A(): RF_0x55[19]= %d\n", is_odd… in phydm_set_kfree_to_rf_8814a()
48 odm_set_rf_reg(p_dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 0); in phydm_set_kfree_to_rf_8814a()
49 odm_set_rf_reg(p_dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 0); in phydm_set_kfree_to_rf_8814a()
53 odm_set_rf_reg(p_dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 1); in phydm_set_kfree_to_rf_8814a()
54 odm_set_rf_reg(p_dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(17) | BIT(16) | BIT(15), 0); in phydm_set_kfree_to_rf_8814a()
58 odm_set_rf_reg(p_dm, e_rf_path, REG_RF_TX_GAIN_OFFSET, BIT(14), 0); in phydm_set_kfree_to_rf_8814a()
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H A Dhalphyrf_win.c35 struct PHY_DM_STRUCT *p_dm, in configure_txpower_track() argument
40 if (p_dm->support_ic_type == ODM_RTL8192E) in configure_txpower_track()
44 if (p_dm->support_ic_type == ODM_RTL8821) in configure_txpower_track()
48 if (p_dm->support_ic_type == ODM_RTL8812) in configure_txpower_track()
52 if (p_dm->support_ic_type == ODM_RTL8188E) in configure_txpower_track()
57 if (p_dm->support_ic_type == ODM_RTL8188F) in configure_txpower_track()
62 if (p_dm->support_ic_type == ODM_RTL8723B) in configure_txpower_track()
67 if (p_dm->support_ic_type == ODM_RTL8814A) in configure_txpower_track()
72 if (p_dm->support_ic_type == ODM_RTL8703B) in configure_txpower_track()
77 if (p_dm->support_ic_type == ODM_RTL8822B) in configure_txpower_track()
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/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723bs/hal/phydm/txbf/
H A Dhaltxbfjaguar.c34 struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void; in hal_txbf_8812a_set_ndpa_rate() local
36 odm_write_1byte(p_dm, REG_NDPA_OPT_CTRL_8812A, (rate << 2 | BW)); in hal_txbf_8812a_set_ndpa_rate()
46 struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void; in hal_txbf_jaguar_rf_mode() local
48 if (p_dm->rf_type == RF_1T1R) in hal_txbf_jaguar_rf_mode()
51 PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] set TxIQGen\n", __func__)); in hal_txbf_jaguar_rf_mode()
53 odm_set_rf_reg(p_dm, RF_PATH_A, 0xef, 0x80000, 0x1); /*RF mode table write enable*/ in hal_txbf_jaguar_rf_mode()
54 odm_set_rf_reg(p_dm, RF_PATH_B, 0xef, 0x80000, 0x1); /*RF mode table write enable*/ in hal_txbf_jaguar_rf_mode()
58 odm_set_rf_reg(p_dm, RF_PATH_A, 0x30, 0x78000, 0x3); /*Select RX mode*/ in hal_txbf_jaguar_rf_mode()
59 odm_set_rf_reg(p_dm, RF_PATH_A, 0x31, 0xfffff, 0x3F7FF); /*Set Table data*/ in hal_txbf_jaguar_rf_mode()
60 odm_set_rf_reg(p_dm, RF_PATH_A, 0x32, 0xfffff, 0xE26BF); /*Enable TXIQGEN in RX mode*/ in hal_txbf_jaguar_rf_mode()
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H A Dhalcomtxbf.c33 struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void; in hal_com_txbf_beamform_init() local
36 if (p_dm->support_ic_type & ODM_RTL8814A) { in hal_com_txbf_beamform_init()
37 is_iqgen_setting_ok = phydm_beamforming_set_iqgen_8814A(p_dm); in hal_com_txbf_beamform_init()
38 PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] is_iqgen_setting_ok = %d\n", __func__, is_iqgen_setting_ok)); in hal_com_txbf_beamform_init()
48 struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void; in hal_com_txbf_config_gtab() local
50 if (p_dm->support_ic_type & ODM_RTL8822B) in hal_com_txbf_config_gtab()
51 hal_txbf_8822b_config_gtab(p_dm); in hal_com_txbf_config_gtab()
59 struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void; in phydm_beamform_set_sounding_enter() local
61 struct _HAL_TXBF_INFO *p_txbf_info = &p_dm->beamforming_info.txbf_info; in phydm_beamform_set_sounding_enter()
66 hal_com_txbf_enter_work_item_callback(p_dm); in phydm_beamform_set_sounding_enter()
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H A Dhaltxbf8814a.c34 struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void; in phydm_beamforming_set_iqgen_8814A() local
40 odm_set_rf_reg(p_dm, i, RF_WE_LUT, 0x80000, 0x1); /*RF mode table write enable*/ in phydm_beamforming_set_iqgen_8814A()
45 odm_set_rf_reg(p_dm, i, RF_RCK_OS, 0xfffff, 0x18000); /*Select Rx mode*/ in phydm_beamforming_set_iqgen_8814A()
50 rf_mode[i] = odm_get_rf_reg(p_dm, i, RF_RCK_OS, 0xfffff); in phydm_beamforming_set_iqgen_8814A()
55 PHYDM_DBG(p_dm, DBG_TXBF, ("iqgen setting fail:8814A\n")); in phydm_beamforming_set_iqgen_8814A()
61 odm_set_rf_reg(p_dm, i, RF_TXPA_G1, 0xfffff, 0xBE77F); /*Set Table data*/ in phydm_beamforming_set_iqgen_8814A()
62 odm_set_rf_reg(p_dm, i, RF_TXPA_G2, 0xfffff, 0x226BF); /*Enable TXIQGEN in Rx mode*/ in phydm_beamforming_set_iqgen_8814A()
64 odm_set_rf_reg(p_dm, RF_PATH_A, RF_TXPA_G2, 0xfffff, 0xE26BF); /*Enable TXIQGEN in Rx mode*/ in phydm_beamforming_set_iqgen_8814A()
67 odm_set_rf_reg(p_dm, i, RF_WE_LUT, 0x80000, 0x0); /*RF mode table write disable*/ in phydm_beamforming_set_iqgen_8814A()
82 struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void; in hal_txbf_8814a_set_ndpa_rate() local
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H A Dhaltxbf8192e.c35 struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void; in hal_txbf_8192e_set_ndpa_rate() local
37 odm_write_1byte(p_dm, REG_NDPA_OPT_CTRL_8192E, (rate << 2 | BW)); in hal_txbf_8192e_set_ndpa_rate()
47 struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void; in hal_txbf_8192e_rf_mode() local
49 PHYDM_DBG(p_dm, DBG_TXBF, ("[%s] Start!\n", __func__)); in hal_txbf_8192e_rf_mode()
51 if (p_dm->rf_type == RF_1T1R) in hal_txbf_8192e_rf_mode()
54 odm_set_rf_reg(p_dm, RF_PATH_A, RF_WE_LUT, 0x80000, 0x1); /*RF mode table write enable*/ in hal_txbf_8192e_rf_mode()
55 odm_set_rf_reg(p_dm, RF_PATH_B, RF_WE_LUT, 0x80000, 0x1); /*RF mode table write enable*/ in hal_txbf_8192e_rf_mode()
59 odm_set_rf_reg(p_dm, RF_PATH_A, 0x30, 0xfffff, 0x18000); /*Select RX mode 0x30=0x18000*/ in hal_txbf_8192e_rf_mode()
60 odm_set_rf_reg(p_dm, RF_PATH_A, 0x31, 0xfffff, 0x0000f); /*Set Table data*/ in hal_txbf_8192e_rf_mode()
61 odm_set_rf_reg(p_dm, RF_PATH_A, 0x32, 0xfffff, 0x77fc2); /*Enable TXIQGEN in RX mode*/ in hal_txbf_8192e_rf_mode()
[all …]
H A Dhaltxbf8822b.c34 struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void; in hal_txbf_8822b_get_ntx() local
38 if (p_dm->support_interface == ODM_ITRF_USB) { in hal_txbf_8822b_get_ntx()
39 if (*p_dm->hub_usb_mode == 2) {/*USB3.0*/ in hal_txbf_8822b_get_ntx()
40 if (p_dm->rf_type == RF_4T4R) in hal_txbf_8822b_get_ntx()
42 else if (p_dm->rf_type == RF_3T3R) in hal_txbf_8822b_get_ntx()
46 } else if (*p_dm->hub_usb_mode == 1) /*USB 2.0 always 2Tx*/ in hal_txbf_8822b_get_ntx()
53 if (p_dm->rf_type == RF_4T4R) in hal_txbf_8822b_get_ntx()
55 else if (p_dm->rf_type == RF_3T3R) in hal_txbf_8822b_get_ntx()
70 struct PHY_DM_STRUCT *p_dm = (struct PHY_DM_STRUCT *)p_dm_void; in hal_txbf_8822b_get_nrx() local
73 if (p_dm->rf_type == RF_4T4R) in hal_txbf_8822b_get_nrx()
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