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Searched refs:mb_wd64 (Results 1 – 3 of 3) sorted by relevance

/OK3568_Linux_fs/external/mpp/mpp/hal/rkenc/h265e/
H A Dhal_h265e_vepu541.c189 RK_S32 mb_wd64, mb_h64; in vepu54x_h265_setup_hal_bufs() local
197 mb_wd64 = (prep->width + 63) / 64; in vepu54x_h265_setup_hal_bufs()
238 ctx->fbc_header_len = MPP_ALIGN(((mb_wd64 * mb_h64) << 6), SZ_8K); in vepu54x_h265_setup_hal_bufs()
239 size[0] = ctx->fbc_header_len + ((mb_wd64 * mb_h64) << 12) * 3 / 2; //fbc_h + fbc_b in vepu54x_h265_setup_hal_bufs()
240 size[1] = (mb_wd64 * mb_h64 << 8); in vepu54x_h265_setup_hal_bufs()
241 size[2] = MPP_ALIGN(mb_wd64 * mb_h64 * 16 * 4, 256); in vepu54x_h265_setup_hal_bufs()
1018 RK_S32 mb_wd64, mb_h64; in vepu541_h265_set_rc_regs() local
1019 mb_wd64 = (syn->pp.pic_width + 63) / 64; in vepu541_h265_set_rc_regs()
1022 RK_U32 ctu_target_bits_mul_16 = (rc_cfg->bit_target << 4) / (mb_wd64 * mb_h64); in vepu541_h265_set_rc_regs()
1036 ctu_target_bits = (ctu_target_bits_mul_16 * mb_wd64) >> 4; in vepu541_h265_set_rc_regs()
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H A Dhal_h265e_vepu540c.c147 RK_S32 mb_wd64, mb_h64; in vepu540c_h265_setup_hal_bufs() local
157 mb_wd64 = (prep->width + 63) / 64; in vepu540c_h265_setup_hal_bufs()
229 ctx->fbc_header_len = MPP_ALIGN(((mb_wd64 * mb_h64) << 6), SZ_8K); in vepu540c_h265_setup_hal_bufs()
230 size[0] = ctx->fbc_header_len + ((mb_wd64 * mb_h64) << 12) * 3 / 2; //fbc_h + fbc_b in vepu540c_h265_setup_hal_bufs()
231 size[1] = (mb_wd64 * mb_h64 << 8); in vepu540c_h265_setup_hal_bufs()
232 size[2] = MPP_ALIGN(mb_wd64 * mb_h64 * 16 * 4, 256) * 16; in vepu540c_h265_setup_hal_bufs()
H A Dhal_h265e_vepu580.c314 RK_S32 mb_wd64, mb_h64; in vepu580_h265_setup_hal_bufs() local
322 mb_wd64 = (prep->width + 63) / 64; in vepu580_h265_setup_hal_bufs()
339 ctx->fbc_header_len = MPP_ALIGN(((mb_wd64 * mb_h64) << 6), SZ_8K); in vepu580_h265_setup_hal_bufs()
340 size[0] = ctx->fbc_header_len + ((mb_wd64 * mb_h64) << 12) * 3 / 2; //fbc_h + fbc_b in vepu580_h265_setup_hal_bufs()
341 size[1] = (mb_wd64 * mb_h64 << 8); in vepu580_h265_setup_hal_bufs()
342 size[2] = MPP_ALIGN(mb_wd64 * mb_h64 * 16 * 6, 256); in vepu580_h265_setup_hal_bufs()
1820 RK_S32 mb_wd64, mb_h64; in vepu580_h265_set_rc_regs() local
1821 mb_wd64 = (syn->pp.pic_width + 63) / 64; in vepu580_h265_set_rc_regs()
1824 RK_U32 ctu_target_bits_mul_16 = (rc_cfg->bit_target << 4) / (mb_wd64 * mb_h64); in vepu580_h265_set_rc_regs()
1838 ctu_target_bits = (ctu_target_bits_mul_16 * mb_wd64) >> 4; in vepu580_h265_set_rc_regs()
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