Searched refs:mainnandsdmmcclk (Results 1 – 2 of 2) sorted by relevance
19 u32 mainnandsdmmcclk; member56 u32 mainnandsdmmcclk; member
176 writel(cfg->mainnandsdmmcclk, in cm_basic_init()177 &clock_manager_base->main_pll.mainnandsdmmcclk); in cm_basic_init()454 reg = readl(&clock_manager_base->main_pll.mainnandsdmmcclk); in cm_get_mmc_controller_clk_hz()