Searched refs:io_sq (Results 1 – 4 of 4) sorted by relevance
36 static void *get_sq_desc_regular_queue(struct ena_com_io_sq *io_sq) in get_sq_desc_regular_queue() argument41 tail_masked = io_sq->tail & (io_sq->q_depth - 1); in get_sq_desc_regular_queue()43 offset = tail_masked * io_sq->desc_entry_size; in get_sq_desc_regular_queue()45 return (void *)((uintptr_t)io_sq->desc_addr.virt_addr + offset); in get_sq_desc_regular_queue()48 static int ena_com_write_bounce_buffer_to_dev(struct ena_com_io_sq *io_sq, in ena_com_write_bounce_buffer_to_dev() argument51 struct ena_com_llq_info *llq_info = &io_sq->llq_info; in ena_com_write_bounce_buffer_to_dev()56 dst_tail_mask = io_sq->tail & (io_sq->q_depth - 1); in ena_com_write_bounce_buffer_to_dev()59 if (is_llq_max_tx_burst_exists(io_sq)) { in ena_com_write_bounce_buffer_to_dev()60 if (unlikely(!io_sq->entries_in_tx_burst_left)) { in ena_com_write_bounce_buffer_to_dev()65 io_sq->entries_in_tx_burst_left--; in ena_com_write_bounce_buffer_to_dev()[all …]
52 int ena_com_prepare_tx(struct ena_com_io_sq *io_sq,57 struct ena_com_io_sq *io_sq,60 int ena_com_add_single_rx_desc(struct ena_com_io_sq *io_sq,72 static inline int ena_com_free_q_entries(struct ena_com_io_sq *io_sq) in ena_com_free_q_entries() argument76 next_to_comp = io_sq->next_to_comp; in ena_com_free_q_entries()77 tail = io_sq->tail; in ena_com_free_q_entries()80 return io_sq->q_depth - 1 - cnt; in ena_com_free_q_entries()84 static inline bool ena_com_sq_have_enough_space(struct ena_com_io_sq *io_sq, in ena_com_sq_have_enough_space() argument89 if (io_sq->mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_HOST) in ena_com_sq_have_enough_space()90 return ena_com_free_q_entries(io_sq) >= required_buffers; in ena_com_sq_have_enough_space()[all …]
309 struct ena_com_io_sq *io_sq) in ena_com_init_io_sq() argument314 memset(&io_sq->desc_addr, 0x0, sizeof(io_sq->desc_addr)); in ena_com_init_io_sq()316 io_sq->dma_addr_bits = (u8)ena_dev->dma_addr_bits; in ena_com_init_io_sq()317 io_sq->desc_entry_size = in ena_com_init_io_sq()318 (io_sq->direction == ENA_COM_IO_QUEUE_DIRECTION_TX) ? in ena_com_init_io_sq()322 size = io_sq->desc_entry_size * io_sq->q_depth; in ena_com_init_io_sq()324 if (io_sq->mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_HOST) { in ena_com_init_io_sq()327 io_sq->desc_addr.virt_addr = in ena_com_init_io_sq()329 &io_sq->desc_addr.phys_addr, in ena_com_init_io_sq()332 if (!io_sq->desc_addr.virt_addr) { in ena_com_init_io_sq()[all …]
451 struct ena_com_io_sq **io_sq,