Searched refs:edma_channel (Results 1 – 2 of 2) sorted by relevance
397 struct edma3_channel_config edma_channel; in __edma3_transfer() local426 edma_channel.slot = edma_slot_num; in __edma3_transfer()427 edma_channel.chnum = 0; in __edma3_transfer()428 edma_channel.complete_code = 0; in __edma3_transfer()430 edma_channel.trigger_slot_word = EDMA3_TWORD(dst); in __edma3_transfer()432 qedma3_start(edma3_base_addr, &edma_channel); in __edma3_transfer()433 edma3_set_dest_addr(edma3_base_addr, edma_channel.slot, addr); in __edma3_transfer()435 while (edma3_check_for_transfer(edma3_base_addr, &edma_channel)) in __edma3_transfer()437 qedma3_stop(edma3_base_addr, &edma_channel); in __edma3_transfer()456 edma_channel.slot = edma_slot_num; in __edma3_transfer()[all …]
155 struct edma3_channel_config edma_channel; in ddr3_reset_data() local183 edma_channel.slot = DDR3_EDMA_SLOT_NUM; in ddr3_reset_data()184 edma_channel.chnum = 0; in ddr3_reset_data()185 edma_channel.complete_code = 0; in ddr3_reset_data()187 edma_channel.trigger_slot_word = EDMA3_TWORD(dst); in ddr3_reset_data()188 qedma3_start(KS2_EDMA0_BASE, &edma_channel); in ddr3_reset_data()220 edma_channel.slot, (u32)edma_src); in ddr3_reset_data()222 edma_channel.slot, (u32)dst); in ddr3_reset_data()225 &edma_channel)) in ddr3_reset_data()230 qedma3_stop(KS2_EDMA0_BASE, &edma_channel); in ddr3_reset_data()