Searched refs:cic_status0 (Results 1 – 2 of 2) sorted by relevance
29 u32 cic_status0; member
1866 while (!(readl(&dram->cic->cic_status0) & (1 << 2))) { in switch_to_phy_index1()1877 while (!(readl(&dram->cic->cic_status0) & (1 << 0))) { in switch_to_phy_index1()2852 while (!(readl(&dram->cic->cic_status0) & (1 << 2))) in dram_set_rate()2862 while (!(readl(&dram->cic->cic_status0) & (1 << 0))) in dram_set_rate()