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Searched refs:chanA (Results 1 – 5 of 5) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/net/wan/
H A Dhostess_sv11.c89 err = z8530_sync_open(d, &sv11->chanA); in hostess_open()
92 err = z8530_sync_dma_open(d, &sv11->chanA); in hostess_open()
95 err = z8530_sync_txdma_open(d, &sv11->chanA); in hostess_open()
106 z8530_sync_close(d, &sv11->chanA); in hostess_open()
109 z8530_sync_dma_close(d, &sv11->chanA); in hostess_open()
112 z8530_sync_txdma_close(d, &sv11->chanA); in hostess_open()
117 sv11->chanA.rx_function = hostess_input; in hostess_open()
133 sv11->chanA.rx_function = z8530_null_rx; in hostess_close()
140 z8530_sync_close(d, &sv11->chanA); in hostess_close()
143 z8530_sync_dma_close(d, &sv11->chanA); in hostess_close()
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H A Dsealevel.c222 b->dev[0].chan = &b->board.chanA; in slvl_init()
245 dev->chanA.ctrlio = iobase + 1; in slvl_init()
246 dev->chanA.dataio = iobase; in slvl_init()
250 dev->chanA.irqs = &z8530_nop; in slvl_init()
270 dev->chanA.private = &b->dev[0]; in slvl_init()
272 dev->chanA.dev = dev; in slvl_init()
275 dev->chanA.txdma = 3; in slvl_init()
276 dev->chanA.rxdma = 1; in slvl_init()
277 if (request_dma(dev->chanA.txdma, "SeaLevel (TX)")) in slvl_init()
280 if (request_dma(dev->chanA.rxdma, "SeaLevel (RX)")) in slvl_init()
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H A Dz85230.c722 intr = read_zsreg(&dev->chanA, R3); in z8530_interrupt()
732 irqs=dev->chanA.irqs; in z8530_interrupt()
737 irqs->rx(&dev->chanA); in z8530_interrupt()
739 irqs->tx(&dev->chanA); in z8530_interrupt()
741 irqs->status(&dev->chanA); in z8530_interrupt()
1244 dev->chanA.irqs=&z8530_nop; in do_z8530_init()
1246 dev->chanA.dcdcheck=DCD; in do_z8530_init()
1250 write_zsreg(&dev->chanA, R9, 0xC0); in do_z8530_init()
1253 write_zsreg(&dev->chanA, R12, 0xAA); in do_z8530_init()
1254 if(read_zsreg(&dev->chanA, R12)!=0xAA) in do_z8530_init()
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H A Dz85230.h379 struct z8530_channel chanA; /* SCC channel A */ member
/OK3568_Linux_fs/kernel/Documentation/networking/device_drivers/wan/
H A Dz8530book.rst65 The structure holds two channel structures. Initialise chanA.ctrlio and
66 chanA.dataio with the address of the control and data ports. You can or
70 platforms, eg for MMIO. Initialise the chanA.irqs to &z8530_nop to
73 Set chanA.dev to point to the device structure itself. The private and