Searched refs:UNIPHIER_SD_CLKCTL (Results 1 – 1 of 1) sorted by relevance
63 #define UNIPHIER_SD_CLKCTL 0x048 /* clock divisor */ macro576 tmp = readl(priv->regbase + UNIPHIER_SD_CLKCTL); in uniphier_sd_set_clk_rate()583 writel(tmp, priv->regbase + UNIPHIER_SD_CLKCTL); in uniphier_sd_set_clk_rate()587 writel(tmp, priv->regbase + UNIPHIER_SD_CLKCTL); in uniphier_sd_set_clk_rate()590 writel(tmp, priv->regbase + UNIPHIER_SD_CLKCTL); in uniphier_sd_set_clk_rate()