Searched refs:SSPA_AUD_PLL_CTRL0_DIV_MCLK (Results 1 – 1 of 1) sorted by relevance
46 #define SSPA_AUD_PLL_CTRL0_DIV_MCLK(x) ((x) << 2) macro147 val |= SSPA_AUD_PLL_CTRL0_DIV_MCLK(predivs[prediv].mclk); in audio_pll_recalc_rate()213 val |= SSPA_AUD_PLL_CTRL0_DIV_MCLK(predivs[prediv].mclk); in audio_pll_set_rate()