Searched refs:SDMA0_PHASE0_QUANTUM__VALUE__SHIFT (Results 1 – 15 of 15) sorted by relevance
355 SDMA0_PHASE0_QUANTUM__VALUE__SHIFT)) { in cik_ctx_switch_enable()362 SDMA0_PHASE0_QUANTUM__VALUE__SHIFT); in cik_ctx_switch_enable()370 value << SDMA0_PHASE0_QUANTUM__VALUE__SHIFT | in cik_ctx_switch_enable()
564 SDMA0_PHASE0_QUANTUM__VALUE__SHIFT)) { in sdma_v3_0_ctx_switch_enable()571 SDMA0_PHASE0_QUANTUM__VALUE__SHIFT); in sdma_v3_0_ctx_switch_enable()579 value << SDMA0_PHASE0_QUANTUM__VALUE__SHIFT | in sdma_v3_0_ctx_switch_enable()
511 SDMA0_PHASE0_QUANTUM__VALUE__SHIFT)) { in sdma_v5_2_ctx_switch_enable()518 SDMA0_PHASE0_QUANTUM__VALUE__SHIFT); in sdma_v5_2_ctx_switch_enable()526 value << SDMA0_PHASE0_QUANTUM__VALUE__SHIFT | in sdma_v5_2_ctx_switch_enable()
573 SDMA0_PHASE0_QUANTUM__VALUE__SHIFT)) { in sdma_v5_0_ctx_switch_enable()580 SDMA0_PHASE0_QUANTUM__VALUE__SHIFT); in sdma_v5_0_ctx_switch_enable()588 value << SDMA0_PHASE0_QUANTUM__VALUE__SHIFT | in sdma_v5_0_ctx_switch_enable()
1044 SDMA0_PHASE0_QUANTUM__VALUE__SHIFT)) { in sdma_v4_0_ctx_switch_enable()1051 SDMA0_PHASE0_QUANTUM__VALUE__SHIFT); in sdma_v4_0_ctx_switch_enable()1059 value << SDMA0_PHASE0_QUANTUM__VALUE__SHIFT | in sdma_v4_0_ctx_switch_enable()
596 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT … macro
597 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT 0x8 macro
599 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT … macro
605 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT … macro
1014 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT 0x8 macro
1104 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT 0x8 macro
1124 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT 0x8 macro
1630 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT 0x8 macro
311 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT … macro
312 #define SDMA0_PHASE0_QUANTUM__VALUE__SHIFT … macro