Searched refs:SDMA0_PHASE0_QUANTUM__UNIT__SHIFT (Results 1 – 15 of 15) sorted by relevance
360 SDMA0_PHASE0_QUANTUM__UNIT__SHIFT)) { in cik_ctx_switch_enable()364 SDMA0_PHASE0_QUANTUM__UNIT__SHIFT); in cik_ctx_switch_enable()371 unit << SDMA0_PHASE0_QUANTUM__UNIT__SHIFT; in cik_ctx_switch_enable()
569 SDMA0_PHASE0_QUANTUM__UNIT__SHIFT)) { in sdma_v3_0_ctx_switch_enable()573 SDMA0_PHASE0_QUANTUM__UNIT__SHIFT); in sdma_v3_0_ctx_switch_enable()580 unit << SDMA0_PHASE0_QUANTUM__UNIT__SHIFT; in sdma_v3_0_ctx_switch_enable()
516 SDMA0_PHASE0_QUANTUM__UNIT__SHIFT)) { in sdma_v5_2_ctx_switch_enable()520 SDMA0_PHASE0_QUANTUM__UNIT__SHIFT); in sdma_v5_2_ctx_switch_enable()527 unit << SDMA0_PHASE0_QUANTUM__UNIT__SHIFT; in sdma_v5_2_ctx_switch_enable()
578 SDMA0_PHASE0_QUANTUM__UNIT__SHIFT)) { in sdma_v5_0_ctx_switch_enable()582 SDMA0_PHASE0_QUANTUM__UNIT__SHIFT); in sdma_v5_0_ctx_switch_enable()589 unit << SDMA0_PHASE0_QUANTUM__UNIT__SHIFT; in sdma_v5_0_ctx_switch_enable()
1049 SDMA0_PHASE0_QUANTUM__UNIT__SHIFT)) { in sdma_v4_0_ctx_switch_enable()1053 SDMA0_PHASE0_QUANTUM__UNIT__SHIFT); in sdma_v4_0_ctx_switch_enable()1060 unit << SDMA0_PHASE0_QUANTUM__UNIT__SHIFT; in sdma_v4_0_ctx_switch_enable()
595 #define SDMA0_PHASE0_QUANTUM__UNIT__SHIFT … macro
596 #define SDMA0_PHASE0_QUANTUM__UNIT__SHIFT 0x0 macro
598 #define SDMA0_PHASE0_QUANTUM__UNIT__SHIFT … macro
604 #define SDMA0_PHASE0_QUANTUM__UNIT__SHIFT … macro
1012 #define SDMA0_PHASE0_QUANTUM__UNIT__SHIFT 0x0 macro
1102 #define SDMA0_PHASE0_QUANTUM__UNIT__SHIFT 0x0 macro
1122 #define SDMA0_PHASE0_QUANTUM__UNIT__SHIFT 0x0 macro
1628 #define SDMA0_PHASE0_QUANTUM__UNIT__SHIFT 0x0 macro
310 #define SDMA0_PHASE0_QUANTUM__UNIT__SHIFT … macro
311 #define SDMA0_PHASE0_QUANTUM__UNIT__SHIFT … macro