Searched refs:REG_A6XX_PDC_GPU_TCS3_CMD0_MSGID (Results 1 – 2 of 2) sorted by relevance
580 pdc_write(pdcptr, REG_A6XX_PDC_GPU_TCS3_CMD0_MSGID, 0x10108); in a6xx_gmu_rpmh_init()584 pdc_write(pdcptr, REG_A6XX_PDC_GPU_TCS3_CMD0_MSGID + 4, 0x10108); in a6xx_gmu_rpmh_init()590 pdc_write(pdcptr, REG_A6XX_PDC_GPU_TCS3_CMD0_MSGID + 8, 0x10108); in a6xx_gmu_rpmh_init()
7508 #define REG_A6XX_PDC_GPU_TCS3_CMD0_MSGID 0x000015d9 macro