Searched refs:PORT_LOGIC_LINK_WIDTH_8_LANES (Results 1 – 5 of 5) sorted by relevance
70 #define PORT_LOGIC_LINK_WIDTH_8_LANES PORT_LOGIC_LINK_WIDTH(0x8) macro
652 val |= PORT_LOGIC_LINK_WIDTH_8_LANES; in dw_pcie_setup()
516 val |= PORT_LOGIC_LINK_WIDTH_8_LANES; in rockchip_pcie_resize_bar()
1013 val |= PORT_LOGIC_LINK_WIDTH_8_LANES; in rk_pcie_ep_setup()
71 #define PORT_LOGIC_LINK_WIDTH_8_LANES (0x8 << 8) macro