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Searched refs:PLLE_SS_CNTL_SSCINCINTRV (Results 1 – 2 of 2) sorted by relevance

/OK3568_Linux_fs/u-boot/arch/arm/mach-tegra/tegra20/
H A Dclock.c622 #define PLLE_SS_CNTL_SSCINCINTRV(x) (((x) & 0x3f) << 24) macro
736 value &= ~PLLE_SS_CNTL_SSCINCINTRV(0x3f); in tegra_plle_enable()
737 value |= PLLE_SS_CNTL_SSCINCINTRV(0x18); in tegra_plle_enable()
/OK3568_Linux_fs/u-boot/arch/arm/mach-tegra/tegra30/
H A Dclock.c651 #define PLLE_SS_CNTL_SSCINCINTRV(x) (((x) & 0x3f) << 24) macro
782 value &= ~PLLE_SS_CNTL_SSCINCINTRV(0x3f); in tegra_plle_enable()
783 value |= PLLE_SS_CNTL_SSCINCINTRV(0x18); in tegra_plle_enable()