Searched refs:IMX6QDL_CLK_PLL4_AUDIO_DIV (Results 1 – 6 of 6) sorted by relevance
216 #define IMX6QDL_CLK_PLL4_AUDIO_DIV 203 macro
213 #define IMX6QDL_CLK_PLL4_AUDIO_DIV 203 macro
451 <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>;452 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>;
289 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>;
421 <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>,
595 …hws[IMX6QDL_CLK_PLL4_AUDIO_DIV] = imx_clk_hw_fixed_factor("pll4_audio_div", "pll4_post_div", 1, 1); in imx6q_clocks_init()597 …hws[IMX6QDL_CLK_PLL4_AUDIO_DIV] = clk_hw_register_divider(NULL, "pll4_audio_div", "pll4_post_div",… in imx6q_clocks_init()