Home
last modified time | relevance | path

Searched refs:IMX6QDL_CLK_IPU2_DI0_SEL (Results 1 – 6 of 6) sorted by relevance

/OK3568_Linux_fs/u-boot/include/dt-bindings/clock/
H A Dimx6qdl-clock.h53 #define IMX6QDL_CLK_IPU2_DI0_SEL 41 macro
/OK3568_Linux_fs/kernel/include/dt-bindings/clock/
H A Dimx6qdl-clock.h50 #define IMX6QDL_CLK_IPU2_DI0_SEL 41 macro
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dimx6qp.dtsi107 <&clks IMX6QDL_CLK_IPU2_DI0_SEL>, <&clks IMX6QDL_CLK_IPU2_DI1_SEL>,
H A Dimx6q.dtsi442 <&clks IMX6QDL_CLK_IPU2_DI0_SEL>, <&clks IMX6QDL_CLK_IPU2_DI1_SEL>,
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dimx6q.dtsi235 <&clks IMX6QDL_CLK_IPU2_DI0_SEL>, <&clks IMX6QDL_CLK_IPU2_DI1_SEL>,
/OK3568_Linux_fs/kernel/drivers/clk/imx/
H A Dclk-imx6q.c668 …hws[IMX6QDL_CLK_IPU2_DI0_SEL] = imx_clk_hw_mux_flags("ipu2_di0_sel", base + 0x38, 0, 3, i… in imx6q_clocks_init()
684 …hws[IMX6QDL_CLK_IPU2_DI0_SEL] = imx_clk_hw_mux_flags("ipu2_di0_sel", base + 0x38, 0, 3, i… in imx6q_clocks_init()
927 clk_set_parent(hws[IMX6QDL_CLK_IPU2_DI0_SEL]->clk, hws[IMX6QDL_CLK_IPU2_DI0_PRE]->clk); in imx6q_clocks_init()