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Searched refs:GRF_REG_FIELD (Results 1 – 8 of 8) sorted by relevance

/OK3568_Linux_fs/u-boot/drivers/video/drm/
H A Ddw_mipi_dsi.c199 #define GRF_REG_FIELD(reg, lsb, msb) (((reg) << 10) | ((lsb) << 5) | (msb)) macro
1358 [DPIUPDATECFG] = GRF_REG_FIELD(0x0434, 7, 7),
1359 [DPICOLORM] = GRF_REG_FIELD(0x0434, 3, 3),
1360 [DPISHUTDN] = GRF_REG_FIELD(0x0434, 2, 2),
1361 [FORCETXSTOPMODE] = GRF_REG_FIELD(0x0438, 7, 10),
1362 [TURNDISABLE] = GRF_REG_FIELD(0x0438, 5, 5),
1363 [VOPSEL] = GRF_REG_FIELD(0x0438, 0, 0),
1372 [MASTERSLAVEZ] = GRF_REG_FIELD(0x0440, 8, 8),
1373 [DPIUPDATECFG] = GRF_REG_FIELD(0x0440, 7, 7),
1374 [DPICOLORM] = GRF_REG_FIELD(0x0440, 3, 3),
[all …]
H A Ddw_mipi_dsi2.c171 #define GRF_REG_FIELD(reg, lsb, msb) (((reg) << 16) | ((lsb) << 8) | (msb)) macro
1236 [TXREQCLKHS_EN] = GRF_REG_FIELD(0x0000, 11, 11),
1237 [GATING_EN] = GRF_REG_FIELD(0x0000, 10, 10),
1238 [IPI_SHUTDN] = GRF_REG_FIELD(0x0000, 9, 9),
1239 [IPI_COLORM] = GRF_REG_FIELD(0x0000, 8, 8),
1240 [IPI_COLOR_DEPTH] = GRF_REG_FIELD(0x0000, 4, 7),
1241 [IPI_FORMAT] = GRF_REG_FIELD(0x0000, 0, 3),
1245 [TXREQCLKHS_EN] = GRF_REG_FIELD(0x0004, 11, 11),
1246 [GATING_EN] = GRF_REG_FIELD(0x0004, 10, 10),
1247 [IPI_SHUTDN] = GRF_REG_FIELD(0x0004, 9, 9),
[all …]
/OK3568_Linux_fs/kernel/drivers/media/platform/rockchip/tsp/
H A Drockchip_tsp.c1111 [TSP_D0] = GRF_REG_FIELD(0xec, 0, 0),
1112 [TSP_D1] = GRF_REG_FIELD(0xec, 2, 2),
1113 [TSP_D2] = GRF_REG_FIELD(0xec, 4, 4),
1114 [TSP_D3] = GRF_REG_FIELD(0xec, 6, 6),
1115 [TSP_D4] = GRF_REG_FIELD(0xec, 8, 8),
1116 [TSP_D5M0] = GRF_REG_FIELD(0xec, 10, 10),
1117 [TSP_D6M0] = GRF_REG_FIELD(0xec, 12, 12),
1118 [TSP_D7M0] = GRF_REG_FIELD(0xec, 14, 14),
1119 [TSP_SYNCM0] = GRF_REG_FIELD(0xf0, 0, 0),
1120 [TSP_FAIL] = GRF_REG_FIELD(0xf0, 2, 2),
[all …]
H A Drockchip_tsp.h129 #define GRF_REG_FIELD(reg, lsb, msb) ((reg << 16) | (lsb << 8) | (msb)) macro
/OK3568_Linux_fs/kernel/drivers/gpu/drm/rockchip/
H A Danalogix_dp-rockchip.c39 #define GRF_REG_FIELD(_reg, _lsb, _msb) { \ macro
767 .lcdc_sel = GRF_REG_FIELD(0x6250, 5, 5),
776 .lcdc_sel = GRF_REG_FIELD(0x025c, 5, 5),
794 .spdif_sel = GRF_REG_FIELD(0x0000, 4, 4),
795 .i2s_sel = GRF_REG_FIELD(0x0000, 3, 3),
796 .edp_mode = GRF_REG_FIELD(0x0000, 0, 0),
803 .spdif_sel = GRF_REG_FIELD(0x0004, 4, 4),
804 .i2s_sel = GRF_REG_FIELD(0x0004, 3, 3),
805 .edp_mode = GRF_REG_FIELD(0x0004, 0, 0),
H A Ddw-mipi-dsi2-rockchip.c179 #define GRF_REG_FIELD(reg, lsb, msb) (((reg) << 16) | ((lsb) << 8) | (msb)) macro
1754 [TXREQCLKHS_EN] = GRF_REG_FIELD(0x0000, 11, 11),
1755 [GATING_EN] = GRF_REG_FIELD(0x0000, 10, 10),
1756 [IPI_SHUTDN] = GRF_REG_FIELD(0x0000, 9, 9),
1757 [IPI_COLORM] = GRF_REG_FIELD(0x0000, 8, 8),
1758 [IPI_COLOR_DEPTH] = GRF_REG_FIELD(0x0000, 4, 7),
1759 [IPI_FORMAT] = GRF_REG_FIELD(0x0000, 0, 3),
1763 [TXREQCLKHS_EN] = GRF_REG_FIELD(0x0004, 11, 11),
1764 [GATING_EN] = GRF_REG_FIELD(0x0004, 10, 10),
1765 [IPI_SHUTDN] = GRF_REG_FIELD(0x0004, 9, 9),
[all …]
H A Drockchip-mipi-csi-tx.c1361 [DPHY_SEL] = GRF_REG_FIELD(0x0440, 8, 8),
1362 [TXSKEWCALHS] = GRF_REG_FIELD(0x0444, 11, 15),
1363 [FORCETXSTOPMODE] = GRF_REG_FIELD(0x0444, 7, 10),
1364 [FORCERXMODE] = GRF_REG_FIELD(0x0444, 6, 6),
1365 [TURNDISABLE] = GRF_REG_FIELD(0x0444, 5, 5),
H A Drockchip-mipi-csi-tx.h212 #define GRF_REG_FIELD(reg, lsb, msb) ((reg << 16) | (lsb << 8) | (msb)) macro