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Searched refs:GEN8_L3SQCREG4 (Results 1 – 6 of 6) sorted by relevance

/OK3568_Linux_fs/kernel/drivers/gpu/drm/i915/gt/
H A Dintel_workarounds.c1448 whitelist_reg(w, GEN8_L3SQCREG4); in skl_whitelist_build()
1469 whitelist_reg(w, GEN8_L3SQCREG4); in kbl_whitelist_build()
1759 GEN8_L3SQCREG4, in rcs_engine_wa_init()
1788 GEN8_L3SQCREG4, in rcs_engine_wa_init()
1895 GEN8_L3SQCREG4, in rcs_engine_wa_init()
H A Dselftest_workarounds.c936 { GEN8_L3SQCREG4, INTEL_GEN_MASK(9, 9) }, in pardon_reg()
H A Dintel_lrc.c3710 *batch++ = i915_mmio_reg_offset(GEN8_L3SQCREG4); in gen8_emit_flush_coherentl3_wa()
3716 *batch++ = i915_mmio_reg_offset(GEN8_L3SQCREG4); in gen8_emit_flush_coherentl3_wa()
3725 *batch++ = i915_mmio_reg_offset(GEN8_L3SQCREG4); in gen8_emit_flush_coherentl3_wa()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/i915/gvt/
H A Dmmio_context.c106 {RCS0, GEN8_L3SQCREG4, 0, false}, /* 0xb118 */
H A Dhandlers.c492 GEN8_L3SQCREG4,//_MMIO(0xb118)
2898 MMIO_DFH(GEN8_L3SQCREG4, D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/i915/
H A Di915_reg.h8080 #define GEN8_L3SQCREG4 _MMIO(0xb118) macro