Searched refs:DAVINCI_PLL_CNTRL0_BASE (Results 1 – 3 of 3) sorted by relevance
128 if (pllbase == (volatile void *)DAVINCI_PLL_CNTRL0_BASE) in pll_prediv()143 if (pllbase == (volatile void *)DAVINCI_PLL_CNTRL0_BASE) in pll_postdiv()174 return pll_sysclk_mhz(DAVINCI_PLL_CNTRL0_BASE, ARM_PLLDIV) * 1000000; in davinci_arm_clk_get()181 return pll_sysclk_mhz(DAVINCI_PLL_CNTRL0_BASE, div) * 1000000; in davinci_clk_get()187 unsigned int pllbase = DAVINCI_PLL_CNTRL0_BASE; in set_cpu_clk_info()195 pll_sysclk_mhz(DAVINCI_PLL_CNTRL0_BASE, DSP_PLLDIV); in set_cpu_clk_info()202 pllbase = DAVINCI_PLL_CNTRL0_BASE; in set_cpu_clk_info()
51 #define DAVINCI_PLL_CNTRL0_BASE (0x01c40800) macro119 #define DAVINCI_PLL_CNTRL0_BASE 0x01c11000 macro426 #define davinci_pllc0_regs ((struct davinci_pllc_regs *)DAVINCI_PLL_CNTRL0_BASE)
75 #define dv_pll0_regs ((struct dv_pll_regs *)DAVINCI_PLL_CNTRL0_BASE)