Searched refs:D2H_READY_WD_RESET_US (Results 1 – 6 of 6) sorted by relevance
1211 #define D2H_READY_WD_RESET_US 1000000 /* 1s */ macro1217 #define D2H_READY_WD_RESET_US 1000 /* 1ms */ macro
7878 OSL_SLEEP(D2H_READY_WD_RESET_US/1000); in dhdpcie_dongle_host_post_wd_reset_sequence()7880 OSL_DELAY(D2H_READY_WD_RESET_US); in dhdpcie_dongle_host_post_wd_reset_sequence()7884 idx * D2H_READY_WD_RESET_US)); in dhdpcie_dongle_host_post_wd_reset_sequence()7928 OSL_SLEEP(D2H_READY_WD_RESET_US/1000); in dhdpcie_dongle_host_pre_chipid_access_sequence()7930 OSL_DELAY(D2H_READY_WD_RESET_US); in dhdpcie_dongle_host_pre_chipid_access_sequence()7934 idx * D2H_READY_WD_RESET_US)); in dhdpcie_dongle_host_pre_chipid_access_sequence()
7870 OSL_SLEEP(D2H_READY_WD_RESET_US/1000); in dhdpcie_dongle_host_post_wd_reset_sequence()7872 OSL_DELAY(D2H_READY_WD_RESET_US); in dhdpcie_dongle_host_post_wd_reset_sequence()7876 idx * D2H_READY_WD_RESET_US)); in dhdpcie_dongle_host_post_wd_reset_sequence()7920 OSL_SLEEP(D2H_READY_WD_RESET_US/1000); in dhdpcie_dongle_host_pre_chipid_access_sequence()7922 OSL_DELAY(D2H_READY_WD_RESET_US); in dhdpcie_dongle_host_pre_chipid_access_sequence()7926 idx * D2H_READY_WD_RESET_US)); in dhdpcie_dongle_host_pre_chipid_access_sequence()