Searched refs:CLK_RST_XUSBIO_PLL_CFG0_PADPLL_SLEEP_IDDQ (Results 1 – 1 of 1) sorted by relevance
211 #define CLK_RST_XUSBIO_PLL_CFG0_PADPLL_SLEEP_IDDQ (1 << 13) macro374 value |= CLK_RST_XUSBIO_PLL_CFG0_PADPLL_SLEEP_IDDQ; in pcie_phy_enable()