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Searched refs:CLKMGR_SDRPLLGRP_DDRDQSCLK_PHASE_MASK (Results 1 – 2 of 2) sorted by relevance

/OK3568_Linux_fs/u-boot/arch/arm/mach-socfpga/include/mach/
H A Dclock_manager_gen5.h305 #define CLKMGR_SDRPLLGRP_DDRDQSCLK_PHASE_MASK 0x00000e00 macro
/OK3568_Linux_fs/u-boot/arch/arm/mach-socfpga/
H A Dclock_manager_gen5.c271 CLKMGR_SDRPLLGRP_DDRDQSCLK_PHASE_MASK); in cm_basic_init()