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Searched refs:ANA_PLL_CD_TX_SER_RATE_SEL (Results 1 – 2 of 2) sorted by relevance

/OK3568_Linux_fs/u-boot/drivers/phy/
H A Dphy-rockchip-samsung-hdptx.c133 #define ANA_PLL_CD_TX_SER_RATE_SEL BIT(3) macro
826 regmap_update_bits(hdptx->regmap, 0x0204, ANA_PLL_CD_TX_SER_RATE_SEL, in rockchip_hdptx_phy_dp_pll_init()
827 FIELD_PREP(ANA_PLL_CD_TX_SER_RATE_SEL, 0x0)); in rockchip_hdptx_phy_dp_pll_init()
/OK3568_Linux_fs/kernel/drivers/phy/rockchip/
H A Dphy-rockchip-samsung-hdptx.c133 #define ANA_PLL_CD_TX_SER_RATE_SEL BIT(3) macro
866 regmap_update_bits(hdptx->regmap, 0x0204, ANA_PLL_CD_TX_SER_RATE_SEL, in rockchip_hdptx_phy_dp_pll_init()
867 FIELD_PREP(ANA_PLL_CD_TX_SER_RATE_SEL, 0x0)); in rockchip_hdptx_phy_dp_pll_init()