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H A Dplat_fdt.cfdf8f929df078943c24154e25d9d7661139826b3 Tue Aug 29 14:44:59 UTC 2023 Amit Nagal <amit.nagal@amd.com> fix(xilinx): update dtb when dtb address and tf-a ddr flow is used

Memory reservation in dtb will be done only when TF-A runs from
ddr and dtb load address is provided.
Otherwise prepare_dtb will simply return.
Empty definition of prepare_dtb is removed.

Signed-off-by: Amit Nagal <amit.nagal@amd.com>
Change-Id: Ie8a3ec51d60a7389831cfe6a112f722777930623