Searched hist:f74d206a485e28eff16dacaa659d3fd9e2e67800 (Results 1 – 7 of 7) sorted by relevance
| /rkbin/RKBOOT/ |
| H A D | PX30MINIALL_WO_FTL.ini | f74d206a485e28eff16dacaa659d3fd9e2e67800 Thu Feb 17 06:34:41 UTC 2022 Zhihuan He <huan.he@rock-chips.com> rk3326/px30: ddr: Update ddr bin to V2.05 20220224
build in:
c9fe371 rk3326/rk3326-s: updata version DDR V2.05 20220224
update feature:
df8be4e rk3326/rk3326-s: enable phy low power
484561e rk3326-s: remove auto sr pd
4db5474 rk3326-s: revert phy low power
d8ad791 rk3326-s: phy: Change REG0x80 to adjust phase of
CKE of LPDDR3/DDR3/LPDDR2
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: I5bfa4295cdae26545df259bfb89956c021b5c32b
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| H A D | RK3326AARCH32MINIALL_SLC.ini | f74d206a485e28eff16dacaa659d3fd9e2e67800 Thu Feb 17 06:34:41 UTC 2022 Zhihuan He <huan.he@rock-chips.com> rk3326/px30: ddr: Update ddr bin to V2.05 20220224
build in:
c9fe371 rk3326/rk3326-s: updata version DDR V2.05 20220224
update feature:
df8be4e rk3326/rk3326-s: enable phy low power
484561e rk3326-s: remove auto sr pd
4db5474 rk3326-s: revert phy low power
d8ad791 rk3326-s: phy: Change REG0x80 to adjust phase of
CKE of LPDDR3/DDR3/LPDDR2
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: I5bfa4295cdae26545df259bfb89956c021b5c32b
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| H A D | RK3326AARCH32MINIALL.ini | f74d206a485e28eff16dacaa659d3fd9e2e67800 Thu Feb 17 06:34:41 UTC 2022 Zhihuan He <huan.he@rock-chips.com> rk3326/px30: ddr: Update ddr bin to V2.05 20220224
build in:
c9fe371 rk3326/rk3326-s: updata version DDR V2.05 20220224
update feature:
df8be4e rk3326/rk3326-s: enable phy low power
484561e rk3326-s: remove auto sr pd
4db5474 rk3326-s: revert phy low power
d8ad791 rk3326-s: phy: Change REG0x80 to adjust phase of
CKE of LPDDR3/DDR3/LPDDR2
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: I5bfa4295cdae26545df259bfb89956c021b5c32b
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| H A D | PX30MINIALL_SLC.ini | f74d206a485e28eff16dacaa659d3fd9e2e67800 Thu Feb 17 06:34:41 UTC 2022 Zhihuan He <huan.he@rock-chips.com> rk3326/px30: ddr: Update ddr bin to V2.05 20220224
build in:
c9fe371 rk3326/rk3326-s: updata version DDR V2.05 20220224
update feature:
df8be4e rk3326/rk3326-s: enable phy low power
484561e rk3326-s: remove auto sr pd
4db5474 rk3326-s: revert phy low power
d8ad791 rk3326-s: phy: Change REG0x80 to adjust phase of
CKE of LPDDR3/DDR3/LPDDR2
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: I5bfa4295cdae26545df259bfb89956c021b5c32b
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| H A D | RK3326MINIALL_SLC.ini | f74d206a485e28eff16dacaa659d3fd9e2e67800 Thu Feb 17 06:34:41 UTC 2022 Zhihuan He <huan.he@rock-chips.com> rk3326/px30: ddr: Update ddr bin to V2.05 20220224
build in:
c9fe371 rk3326/rk3326-s: updata version DDR V2.05 20220224
update feature:
df8be4e rk3326/rk3326-s: enable phy low power
484561e rk3326-s: remove auto sr pd
4db5474 rk3326-s: revert phy low power
d8ad791 rk3326-s: phy: Change REG0x80 to adjust phase of
CKE of LPDDR3/DDR3/LPDDR2
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: I5bfa4295cdae26545df259bfb89956c021b5c32b
|
| H A D | PX30MINIALL.ini | f74d206a485e28eff16dacaa659d3fd9e2e67800 Thu Feb 17 06:34:41 UTC 2022 Zhihuan He <huan.he@rock-chips.com> rk3326/px30: ddr: Update ddr bin to V2.05 20220224
build in:
c9fe371 rk3326/rk3326-s: updata version DDR V2.05 20220224
update feature:
df8be4e rk3326/rk3326-s: enable phy low power
484561e rk3326-s: remove auto sr pd
4db5474 rk3326-s: revert phy low power
d8ad791 rk3326-s: phy: Change REG0x80 to adjust phase of
CKE of LPDDR3/DDR3/LPDDR2
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: I5bfa4295cdae26545df259bfb89956c021b5c32b
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| H A D | RK3326MINIALL.ini | f74d206a485e28eff16dacaa659d3fd9e2e67800 Thu Feb 17 06:34:41 UTC 2022 Zhihuan He <huan.he@rock-chips.com> rk3326/px30: ddr: Update ddr bin to V2.05 20220224
build in:
c9fe371 rk3326/rk3326-s: updata version DDR V2.05 20220224
update feature:
df8be4e rk3326/rk3326-s: enable phy low power
484561e rk3326-s: remove auto sr pd
4db5474 rk3326-s: revert phy low power
d8ad791 rk3326-s: phy: Change REG0x80 to adjust phase of
CKE of LPDDR3/DDR3/LPDDR2
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: I5bfa4295cdae26545df259bfb89956c021b5c32b
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