| #
cfafd418 |
| 19-Aug-2024 |
Zhihuan He <huan.he@rock-chips.com> |
px30: ddr: Update to DDR 20240819 fwver: v2.11
build in:
01f75b4 rk3326/px30: ddr: Update to DDR 20240819 fwver: v2.11
update feature:
0a8027c RK3326/RK3326S: fix ddr4 cap detect error
Signed-of
px30: ddr: Update to DDR 20240819 fwver: v2.11
build in:
01f75b4 rk3326/px30: ddr: Update to DDR 20240819 fwver: v2.11
update feature:
0a8027c RK3326/RK3326S: fix ddr4 cap detect error
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: I23d8e4d553df7d4275410cdf9fac0f9c8d18af5b
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| #
5579d203 |
| 13-May-2024 |
Zhihuan He <huan.he@rock-chips.com> |
px30: ddr: Update to DDR 20240527 fwver: v2.10
build in:
29a6ff7 rk3326/px30: ddr: Update to DDR 20240527 fwver: v2.10
update feature:
1b9746b RK3326/RK3326S: add sram base judge
23b4b9a rk3326s
px30: ddr: Update to DDR 20240527 fwver: v2.10
build in:
29a6ff7 rk3326/px30: ddr: Update to DDR 20240527 fwver: v2.10
update feature:
1b9746b RK3326/RK3326S: add sram base judge
23b4b9a rk3326s/px30s: set cke low before clk for lp3
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: Idc674e20d57d332928b73dc34ce0c08f6e66e858
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| #
dd6f4723 |
| 18-Dec-2023 |
Zhihuan He <huan.he@rock-chips.com> |
px30: ddr: Update to DDR 20231220 fwver: v2.09
build in:
131f35b rk3326/px30: ddr: Update to DDR 20231220 fwver: v2.09
update feature:
aa766aa rk3358m/rk3358j: 2x refresh for Extended temperature
px30: ddr: Update to DDR 20231220 fwver: v2.09
build in:
131f35b rk3326/px30: ddr: Update to DDR 20231220 fwver: v2.09
update feature:
aa766aa rk3358m/rk3358j: 2x refresh for Extended temperature
range
c6a0e76 rk3326s/px30s: ddr: add DQS 3.2kohm weak pull up/down
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: I8f89dc0170db03426335a6495df5c3758328adbf
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| #
174394f4 |
| 27-Oct-2022 |
Zhihuan He <huan.he@rock-chips.com> |
px30: ddr: Update ddr bin to V2.08 20220817
build in:
e5b9702 rk3326/px30: ddr: Update ddr bin to V2.08 20220817
update feature:
80092f9 rk3326/rk3326-s: reserved for maskrom to add special
param
px30: ddr: Update ddr bin to V2.08 20220817
build in:
e5b9702 rk3326/px30: ddr: Update ddr bin to V2.08 20220817
update feature:
80092f9 rk3326/rk3326-s: reserved for maskrom to add special
parameters
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: Ib7a7fb27728c4c2a862d836496a1e7836faa58b9
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|
| #
3968b8eb |
| 23-Mar-2022 |
Zhihuan He <huan.he@rock-chips.com> |
rk3326/px30: ddr: Update ddr bin to V2.07 20220531
build in:
ade1fa4 rk3326/px30: ddr: Update ddr bin to V2.07 20220531
update feature:
9aca9ae project: move project
a8a5a50 rk3326/px30: ddr: Up
rk3326/px30: ddr: Update ddr bin to V2.07 20220531
build in:
ade1fa4 rk3326/px30: ddr: Update ddr bin to V2.07 20220531
update feature:
9aca9ae project: move project
a8a5a50 rk3326/px30: ddr: Update ddr bin to V2.07 20220406
010d434 rk3326-s/rk3326: enable 2T
38e4e4a rk3326-s: set logic to 0.95V
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: Ie432c90a5511567677f769940b91c08be9320508
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|
| #
89047911 |
| 14-Mar-2022 |
Zhihuan He <huan.he@rock-chips.com> |
rk3326/px30: ddr: Update ddr bin to V2.06 20220317
build in:
fd145a6 rk3326/rk3326-s: updata version DDR V2.06 20220317
update feature:
8da20fb rk3326/rk3326-s: enable all phy low power mode
e62
rk3326/px30: ddr: Update ddr bin to V2.06 20220317
build in:
fd145a6 rk3326/rk3326-s: updata version DDR V2.06 20220317
update feature:
8da20fb rk3326/rk3326-s: enable all phy low power mode
e62fc14 Merge branch 'rk3326s_debug' into rk3326_base_rk3228h_V1.12
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: I8c33334457a19e2413a4596d811560e456e5dc9a
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|
| #
349433c4 |
| 08-Mar-2022 |
Jason Zhu <jason.zhu@rock-chips.com> |
rk3326/px30: close rc4
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I3ce7b52c0a595f1ae960ba13454eae01a72e89c7
|
| #
8aa0ba94 |
| 04-Mar-2022 |
Yifeng Zhao <yifeng.zhao@rock-chips.com> |
rk3326s: usbplug: Update to v1.36
from commit:
rk_boot_all: c7de69a673: rk3326s: add usb phy tuning
update feature:
add usb phy tuning
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.c
rk3326s: usbplug: Update to v1.36
from commit:
rk_boot_all: c7de69a673: rk3326s: add usb phy tuning
update feature:
add usb phy tuning
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: Ice62ec584231c115c08f98aa4bbd800228824386
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|
| #
f74d206a |
| 17-Feb-2022 |
Zhihuan He <huan.he@rock-chips.com> |
rk3326/px30: ddr: Update ddr bin to V2.05 20220224
build in:
c9fe371 rk3326/rk3326-s: updata version DDR V2.05 20220224
update feature:
df8be4e rk3326/rk3326-s: enable phy low power
484561e rk332
rk3326/px30: ddr: Update ddr bin to V2.05 20220224
build in:
c9fe371 rk3326/rk3326-s: updata version DDR V2.05 20220224
update feature:
df8be4e rk3326/rk3326-s: enable phy low power
484561e rk3326-s: remove auto sr pd
4db5474 rk3326-s: revert phy low power
d8ad791 rk3326-s: phy: Change REG0x80 to adjust phase of
CKE of LPDDR3/DDR3/LPDDR2
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: I5bfa4295cdae26545df259bfb89956c021b5c32b
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|
| #
83bab16f |
| 21-Jan-2022 |
Wesley Yao <wesley.yao@rock-chips.com> |
rk3326/px30: ddr: Update ddr bin to V2.04 20220121
build from RK3326_DDR_Init_Simple:
c8ac34ce rk3326/rk3326-s: Update DDR bin to V2.04 20220121
update feature:
255e5ca0 rk3326/rk3326-s: Set dfi_
rk3326/px30: ddr: Update ddr bin to V2.04 20220121
build from RK3326_DDR_Init_Simple:
c8ac34ce rk3326/rk3326-s: Update DDR bin to V2.04 20220121
update feature:
255e5ca0 rk3326/rk3326-s: Set dfi_lp_wakeup_sr/pd to 0x0
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: I267bf5c6c1389695112b665371d57fccadb9a5d4
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|
| #
0aa03df2 |
| 21-Jan-2022 |
Wesley Yao <wesley.yao@rock-chips.com> |
rk3326/px30: ddr: Update ddr bin to V2.03 20220121
build from RK3326_DDR_Init_Simple:
980d865192 rk3326/rk3326-s: Update DDR bin to V2.03 20220121
update feature:
da0ff2abaa rk3326-s: Set ca_odt(R
rk3326/px30: ddr: Update ddr bin to V2.03 20220121
build from RK3326_DDR_Init_Simple:
980d865192 rk3326/rk3326-s: Update DDR bin to V2.03 20220121
update feature:
da0ff2abaa rk3326-s: Set ca_odt(REG0x40[13:12]) of LPDDR4 according to bw
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: I3b8f9bcf96841815b88e3772d7a3a808eb2435d5
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|
| #
750302a7 |
| 18-Jan-2022 |
Wesley Yao <wesley.yao@rock-chips.com> |
rk3326/px30: ddr: Update ddr bin to V2.02 20220118 to support rk3326-s/px30-s
build from RK3326_DDR_Init_Simple:
d6f4cb05c9 rk3326/rk3326-s: Update DDR bin to V2.02 20220118
update feature:
6faa6
rk3326/px30: ddr: Update ddr bin to V2.02 20220118 to support rk3326-s/px30-s
build from RK3326_DDR_Init_Simple:
d6f4cb05c9 rk3326/rk3326-s: Update DDR bin to V2.02 20220118
update feature:
6faa6a326a rk3326-s: Set VDD_logic to 1.0V
8e81392239 rk3326-s: Disable some low power functions to prevent sleep and resume
(level 2) fail
9590d94add px30s: can not support row = 17 of lp4
c699c118bb px30s: modify dfi_tlp_resp to 0xa
df3d5d15fc px30s: modify vdd_logic to 0.9v
0fa00910a4 px30s: clear ddr clk gate for soft reset
08f7c28847 rk3326/rk3326s: Optimize the size of ddr bin
153b747d5f rk3326-s: Fix get_uboot_params() when sdram_params->ch.row_3_4 == 1
3b83b56391 rk3326s: set logic to 1.0V
a8eced54fb rk3326/s: all dram bring up ok
b280140e97 rk3326/s: add debug info
c4b391e8b4 rk3326/rk3326s: modify dfi timing for lp3/2
cec9c2868b rk3326/rk3326s: diff dfi tctrl_delay setting
de967f4b65 rk3326/rk3326s: modify dfi timing
fa9c9e3f4f rk3326s: add fix drv odt config
c534fef2c6 rk3326s: add support lp4
69776fa864 rk3326: inc: add rk3326s phy reg
3a1078c07d RK3326S: modify to PHY_REG_3326S define
fc7426a9a7 rk3326/S: save and restore arm special reg
2651ce4f97 rk3326/S: add check return to smc code
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: Id91158b3d6decc57366dc3259e232f24da6b64ce
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|
| #
2dfef0d2 |
| 30-Dec-2021 |
Jon Lin <jon.lin@rock-chips.com> |
px30: loader: Support wo_ftl version
build from:
rk_boot_all: a9c0f0 paltform: rk3326: Update to v1.35
update feture:
Ver1.35 without ftl code.
Change-Id: I5937407a7c209ac6e1542f740be6784e5b7f037
px30: loader: Support wo_ftl version
build from:
rk_boot_all: a9c0f0 paltform: rk3326: Update to v1.35
update feture:
Ver1.35 without ftl code.
Change-Id: I5937407a7c209ac6e1542f740be6784e5b7f037f
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
show more ...
|