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/optee_os/core/drivers/clk/sam/
H A Dat91_cpu_opp.cf496f2c40c7cfad27e0596070b126b86ef46ae8d Thu Jun 13 07:04:25 UTC 2024 Tony Han <tony.han@microchip.com> plat-sam: prepare for CPU OPP (Operating Performance Points) support

Initialize clock rates array by parsing the device tree.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
H A Dsub.mkf496f2c40c7cfad27e0596070b126b86ef46ae8d Thu Jun 13 07:04:25 UTC 2024 Tony Han <tony.han@microchip.com> plat-sam: prepare for CPU OPP (Operating Performance Points) support

Initialize clock rates array by parsing the device tree.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
H A Dat91_clk.hf496f2c40c7cfad27e0596070b126b86ef46ae8d Thu Jun 13 07:04:25 UTC 2024 Tony Han <tony.han@microchip.com> plat-sam: prepare for CPU OPP (Operating Performance Points) support

Initialize clock rates array by parsing the device tree.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
/optee_os/core/arch/arm/plat-sam/
H A Dfreq.cf496f2c40c7cfad27e0596070b126b86ef46ae8d Thu Jun 13 07:04:25 UTC 2024 Tony Han <tony.han@microchip.com> plat-sam: prepare for CPU OPP (Operating Performance Points) support

Initialize clock rates array by parsing the device tree.

Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>