Searched hist:ed74d1c4e2fb36a55697761a0e1c6cf47884e144 (Results 1 – 2 of 2) sorted by relevance
| /optee_os/core/drivers/crypto/caam/hal/common/ |
| H A D | hal_cfg_dt.c | ed74d1c4e2fb36a55697761a0e1c6cf47884e144 Tue Mar 09 14:24:52 UTC 2021 Ludovic Barre <ludovic.barre@foss.st.com> core: dt: take account type of interrupt in dt_get_irq()
Interrupt DT binding is defined by at least 2 cells as per DT binding
documentation [1]:
```
-The 1st cell is the interrupt type; 0 for SPI interrupts,
1 for PPI interrupts.
-The 2nd cell contains the interrupt number for the interrupt type.
SPI interrupts are in the range [0-987].
PPI interrupts are in the range [0-15].
```
This patch takes the first cell into account to return absolute value
required for itr_enable() interface.
Update CAAM crypto driver accordingly.
Link: [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml?h=v5.9#n66
Signed-off-by: Ludovic Barre <ludovic.barre@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome@forissier.org>
|
| /optee_os/core/drivers/ |
| H A D | gic.c | ed74d1c4e2fb36a55697761a0e1c6cf47884e144 Tue Mar 09 14:24:52 UTC 2021 Ludovic Barre <ludovic.barre@foss.st.com> core: dt: take account type of interrupt in dt_get_irq()
Interrupt DT binding is defined by at least 2 cells as per DT binding
documentation [1]:
```
-The 1st cell is the interrupt type; 0 for SPI interrupts,
1 for PPI interrupts.
-The 2nd cell contains the interrupt number for the interrupt type.
SPI interrupts are in the range [0-987].
PPI interrupts are in the range [0-15].
```
This patch takes the first cell into account to return absolute value
required for itr_enable() interface.
Update CAAM crypto driver accordingly.
Link: [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml?h=v5.9#n66
Signed-off-by: Ludovic Barre <ludovic.barre@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jerome Forissier <jerome@forissier.org>
|