Searched hist:e236548455cc3f8e28cdd2daa3cffc6fae6ea73c (Results 1 – 3 of 3) sorted by relevance
| /rk3399_ARM-atf/lib/cpus/aarch64/ |
| H A D | cortex_x2.S | e236548455cc3f8e28cdd2daa3cffc6fae6ea73c Sat Jul 12 02:26:00 UTC 2025 John Powell <john.powell@arm.com> fix(cpus): workaround for Cortex-X2 erratum 1927200
Cortex-X2 erratum 1927200 is a Cat B erratum that applies to
revisions r0p0 and r1p0 and is fixed in r2p0.
The workaround is to use instruction patching to insert a DMB ST
before acquire atomic instructions without release semantics.
SDEN documentation:
https://developer.arm.com/documentation/SDEN-1775100/latest
Change-Id: I8d9038df1907888b3c5b2520d06bc150665e74a1
Signed-off-by: John Powell <john.powell@arm.com>
|
| /rk3399_ARM-atf/docs/design/ |
| H A D | cpu-specific-build-macros.rst | e236548455cc3f8e28cdd2daa3cffc6fae6ea73c Sat Jul 12 02:26:00 UTC 2025 John Powell <john.powell@arm.com> fix(cpus): workaround for Cortex-X2 erratum 1927200
Cortex-X2 erratum 1927200 is a Cat B erratum that applies to
revisions r0p0 and r1p0 and is fixed in r2p0.
The workaround is to use instruction patching to insert a DMB ST
before acquire atomic instructions without release semantics.
SDEN documentation:
https://developer.arm.com/documentation/SDEN-1775100/latest
Change-Id: I8d9038df1907888b3c5b2520d06bc150665e74a1
Signed-off-by: John Powell <john.powell@arm.com>
|
| /rk3399_ARM-atf/lib/cpus/ |
| H A D | cpu-ops.mk | e236548455cc3f8e28cdd2daa3cffc6fae6ea73c Sat Jul 12 02:26:00 UTC 2025 John Powell <john.powell@arm.com> fix(cpus): workaround for Cortex-X2 erratum 1927200
Cortex-X2 erratum 1927200 is a Cat B erratum that applies to
revisions r0p0 and r1p0 and is fixed in r2p0.
The workaround is to use instruction patching to insert a DMB ST
before acquire atomic instructions without release semantics.
SDEN documentation:
https://developer.arm.com/documentation/SDEN-1775100/latest
Change-Id: I8d9038df1907888b3c5b2520d06bc150665e74a1
Signed-off-by: John Powell <john.powell@arm.com>
|