Searched hist:d91c417716f260081e6a78f561224117088fc2e0 (Results 1 – 3 of 3) sorted by relevance
| /rk3399_ARM-atf/lib/cpus/aarch64/ |
| H A D | cortex_a710.S | d91c417716f260081e6a78f561224117088fc2e0 Mon Jun 09 19:32:39 UTC 2025 John Powell <john.powell@arm.com> fix(cpus): workaround for Cortex-A710 erratum 1917258
Cortex-A710 erratum 1917258 is a Cat B erratum that applies
to revisions r0p0 and r1p0 and is fixed in r2p0.
The workaround is to set CPUACTLR4_EL1[43]. This has no
performance impact.
SDEN documentation:
https://developer.arm.com/documentation/SDEN1775101
Change-Id: I1fae91a5e3a8ecea255f0f0a481bfd6196a7db51
Signed-off-by: John Powell <john.powell@arm.com>
|
| /rk3399_ARM-atf/docs/design/ |
| H A D | cpu-specific-build-macros.rst | d91c417716f260081e6a78f561224117088fc2e0 Mon Jun 09 19:32:39 UTC 2025 John Powell <john.powell@arm.com> fix(cpus): workaround for Cortex-A710 erratum 1917258
Cortex-A710 erratum 1917258 is a Cat B erratum that applies
to revisions r0p0 and r1p0 and is fixed in r2p0.
The workaround is to set CPUACTLR4_EL1[43]. This has no
performance impact.
SDEN documentation:
https://developer.arm.com/documentation/SDEN1775101
Change-Id: I1fae91a5e3a8ecea255f0f0a481bfd6196a7db51
Signed-off-by: John Powell <john.powell@arm.com>
|
| /rk3399_ARM-atf/lib/cpus/ |
| H A D | cpu-ops.mk | d91c417716f260081e6a78f561224117088fc2e0 Mon Jun 09 19:32:39 UTC 2025 John Powell <john.powell@arm.com> fix(cpus): workaround for Cortex-A710 erratum 1917258
Cortex-A710 erratum 1917258 is a Cat B erratum that applies
to revisions r0p0 and r1p0 and is fixed in r2p0.
The workaround is to set CPUACTLR4_EL1[43]. This has no
performance impact.
SDEN documentation:
https://developer.arm.com/documentation/SDEN1775101
Change-Id: I1fae91a5e3a8ecea255f0f0a481bfd6196a7db51
Signed-off-by: John Powell <john.powell@arm.com>
|