Searched hist:c94adf20a68d5525f96dad699ee3d9d1a379f106 (Results 1 – 1 of 1) sorted by relevance
| /optee_os/core/drivers/firewall/ |
| H A D | stm32_risab.c | c94adf20a68d5525f96dad699ee3d9d1a379f106 Mon Jul 22 09:03:42 UTC 2024 Gatien Chevallier <gatien.chevallier@foss.st.com> drivers: stm32_risab: implement transient CID0 on AHB errata for RISAB
On stm32mp2x SoCs, when an AHB busy signal is inserted during a
transaction, a ghost CID0 is generated on the bus. If the compartment
filtering is enabled on RISAB3/4/5, this transient CID0 is interpreted
as a fault access by RISAB3/4/5 which aborts current access and returns
an IAC. Described in section 2.3.21 of errata sheet available here: [1].
Therefore, when CID filtering is enabled on RISAB, we must ban CID0 as
a possible CID value configured for any initiator on the bus.
This avoids a conflict between an initiator holding CID0 and the
transient CID0.
Force authorize CID0 access on RISAB so that it can always access
memories protected by RISABs when the "st,errata-ahbrisab" property is
set in the device tree.
Link: https://www.st.com/resource/en/errata_sheet/es0598-stm32mp23xx25xx-device-errata-stmicroelectronics.pdf [1]
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
|