Searched hist:c1253b2445d6b57851118fb9cb4ee1eac9e122be (Results 1 – 4 of 4) sorted by relevance
| /rk3399_ARM-atf/plat/intel/soc/common/aarch64/ |
| H A D | plat_helpers.S | c1253b2445d6b57851118fb9cb4ee1eac9e122be Thu Oct 24 15:41:02 UTC 2024 Sieu Mun Tang <sieu.mun.tang@intel.com> fix(intel): update Agilex5 warm reset subroutines
Update the 'plat_get_my_entrypoint' assembly routine to
differentiate between cold reset, warm reset and SMP
secondary boot cores request.
Add secondary core boot request markup in BL31.
Perform CACHE flush/clean ops in case of warm reset request also.
Change-Id: I7d33e362a3a513c60c8333e062ce832aa7facf38
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
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| /rk3399_ARM-atf/plat/intel/soc/agilex5/ |
| H A D | bl31_plat_setup.c | c1253b2445d6b57851118fb9cb4ee1eac9e122be Thu Oct 24 15:41:02 UTC 2024 Sieu Mun Tang <sieu.mun.tang@intel.com> fix(intel): update Agilex5 warm reset subroutines
Update the 'plat_get_my_entrypoint' assembly routine to
differentiate between cold reset, warm reset and SMP
secondary boot cores request.
Add secondary core boot request markup in BL31.
Perform CACHE flush/clean ops in case of warm reset request also.
Change-Id: I7d33e362a3a513c60c8333e062ce832aa7facf38
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
|
| /rk3399_ARM-atf/plat/intel/soc/common/ |
| H A D | socfpga_psci.c | c1253b2445d6b57851118fb9cb4ee1eac9e122be Thu Oct 24 15:41:02 UTC 2024 Sieu Mun Tang <sieu.mun.tang@intel.com> fix(intel): update Agilex5 warm reset subroutines
Update the 'plat_get_my_entrypoint' assembly routine to
differentiate between cold reset, warm reset and SMP
secondary boot cores request.
Add secondary core boot request markup in BL31.
Perform CACHE flush/clean ops in case of warm reset request also.
Change-Id: I7d33e362a3a513c60c8333e062ce832aa7facf38
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
|
| /rk3399_ARM-atf/plat/intel/soc/common/include/ |
| H A D | platform_def.h | c1253b2445d6b57851118fb9cb4ee1eac9e122be Thu Oct 24 15:41:02 UTC 2024 Sieu Mun Tang <sieu.mun.tang@intel.com> fix(intel): update Agilex5 warm reset subroutines
Update the 'plat_get_my_entrypoint' assembly routine to
differentiate between cold reset, warm reset and SMP
secondary boot cores request.
Add secondary core boot request markup in BL31.
Perform CACHE flush/clean ops in case of warm reset request also.
Change-Id: I7d33e362a3a513c60c8333e062ce832aa7facf38
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
|