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| /rk3399_ARM-atf/drivers/st/clk/ |
| H A D | stm32mp1_clk.c | b8fe48b6f2b07fce49363cb3c0f8dac9e286439b Thu Dec 19 09:03:23 UTC 2019 Etienne Carriere <etienne.carriere@st.com> fix(stm32mp1_clk): fix MCU/AXI parent clock
Correct MCU clock parent selector: MCU subsystem clock is derived
from clock PLL3_P, not PLL3.
Correct AXI clock parent selector: AXI subsystem clock is derived
from clock PLL2_P, not PLL2.
This change also renames MCU clock and AXI clock resources to
prevent confusion.
Change-Id: If55618d180e7dce8e4f0977b0e586a6fa8ef28d1
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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