Searched hist:b87b02cf1d93f2be2113192cd5f1927e33121a80 (Results 1 – 3 of 3) sorted by relevance
| /rk3399_ARM-atf/lib/cpus/aarch64/ |
| H A D | cortex_a710.S | b87b02cf1d93f2be2113192cd5f1927e33121a80 Wed Dec 07 19:32:35 UTC 2022 Bipin Ravi <bipin.ravi@arm.com> fix(cpus): workaround for Cortex-A710 erratum 2768515
Cortex-A710 erratum 2768515 is a Cat B erratum that applies to
all revisions <=r2p1 and is still open. The workaround is to
insert a dsb before the isb in the power down sequence.
SDEN documentation:
https://developer.arm.com/documentation/SDEN1775101/latest
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: If17fe04d3fda0dba6b8aabdd837a1c53e1830ed5
|
| /rk3399_ARM-atf/docs/design/ |
| H A D | cpu-specific-build-macros.rst | b87b02cf1d93f2be2113192cd5f1927e33121a80 Wed Dec 07 19:32:35 UTC 2022 Bipin Ravi <bipin.ravi@arm.com> fix(cpus): workaround for Cortex-A710 erratum 2768515
Cortex-A710 erratum 2768515 is a Cat B erratum that applies to
all revisions <=r2p1 and is still open. The workaround is to
insert a dsb before the isb in the power down sequence.
SDEN documentation:
https://developer.arm.com/documentation/SDEN1775101/latest
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: If17fe04d3fda0dba6b8aabdd837a1c53e1830ed5
|
| /rk3399_ARM-atf/lib/cpus/ |
| H A D | cpu-ops.mk | b87b02cf1d93f2be2113192cd5f1927e33121a80 Wed Dec 07 19:32:35 UTC 2022 Bipin Ravi <bipin.ravi@arm.com> fix(cpus): workaround for Cortex-A710 erratum 2768515
Cortex-A710 erratum 2768515 is a Cat B erratum that applies to
all revisions <=r2p1 and is still open. The workaround is to
insert a dsb before the isb in the power down sequence.
SDEN documentation:
https://developer.arm.com/documentation/SDEN1775101/latest
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: If17fe04d3fda0dba6b8aabdd837a1c53e1830ed5
|