Searched hist:b47d97b39588bd7b3b455980fd51acf6d316750c (Results 1 – 2 of 2) sorted by relevance
| /rk3399_ARM-atf/plat/nvidia/tegra/soc/t186/ |
| H A D | plat_secondary.c | b47d97b39588bd7b3b455980fd51acf6d316750c Mon Sep 14 04:01:39 UTC 2015 Varun Wadekar <vwadekar@nvidia.com> Tegra186: power on/off secondary CPUs
This patch add code to power on/off the secondary CPUs on the Tegra186
chip. The MCE block is the actual hardware that takes care of the
power on/off sequence. We pass the constructed CPU #, depending on the
MIDR_IMPL field, to the MCE CPU handlers.
This patch also programs the reset vector addresses to allow the
CPUs to power on through the monitor and then jump to the linux
world.
Change-Id: Idc164586cda91c2009d66f3e09bf4464de9662db
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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| H A D | plat_psci_handlers.c | b47d97b39588bd7b3b455980fd51acf6d316750c Mon Sep 14 04:01:39 UTC 2015 Varun Wadekar <vwadekar@nvidia.com> Tegra186: power on/off secondary CPUs
This patch add code to power on/off the secondary CPUs on the Tegra186
chip. The MCE block is the actual hardware that takes care of the
power on/off sequence. We pass the constructed CPU #, depending on the
MIDR_IMPL field, to the MCE CPU handlers.
This patch also programs the reset vector addresses to allow the
CPUs to power on through the monitor and then jump to the linux
world.
Change-Id: Idc164586cda91c2009d66f3e09bf4464de9662db
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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