13cf3183fSVarun Wadekar /* 293c78ed2SAntonio Nino Diaz * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. 38336c94dSVarun Wadekar * Copyright (c) 2020, NVIDIA Corporation. All rights reserved. 43cf3183fSVarun Wadekar * 582cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 63cf3183fSVarun Wadekar */ 73cf3183fSVarun Wadekar 868c7de6fSVarun Wadekar #include <string.h> 909d40e0eSAntonio Nino Diaz 1009d40e0eSAntonio Nino Diaz #include <arch_helpers.h> 1109d40e0eSAntonio Nino Diaz #include <common/debug.h> 1209d40e0eSAntonio Nino Diaz #include <lib/mmio.h> 1309d40e0eSAntonio Nino Diaz 1409d40e0eSAntonio Nino Diaz #include <mce.h> 15b47d97b3SVarun Wadekar #include <tegra_def.h> 1668c7de6fSVarun Wadekar #include <tegra_private.h> 17b47d97b3SVarun Wadekar 18592035d0SAnthony Zhou #define SCRATCH_SECURE_RSV1_SCRATCH_0 0x658U 19592035d0SAnthony Zhou #define SCRATCH_SECURE_RSV1_SCRATCH_1 0x65CU 20b47d97b3SVarun Wadekar 21592035d0SAnthony Zhou #define CPU_RESET_MODE_AA64 1U 22b47d97b3SVarun Wadekar 233cf3183fSVarun Wadekar /******************************************************************************* 243cf3183fSVarun Wadekar * Setup secondary CPU vectors 253cf3183fSVarun Wadekar ******************************************************************************/ plat_secondary_setup(void)263cf3183fSVarun Wadekarvoid plat_secondary_setup(void) 273cf3183fSVarun Wadekar { 28b47d97b3SVarun Wadekar uint32_t addr_low, addr_high; 29b47d97b3SVarun Wadekar 30b47d97b3SVarun Wadekar INFO("Setting up secondary CPU boot\n"); 31b47d97b3SVarun Wadekar 327191566cSVarun Wadekar /* TZDRAM base will be used as the "resume" address */ 33*2139c9c8SVarun Wadekar addr_low = (uintptr_t)&tegra_secure_entrypoint | CPU_RESET_MODE_AA64; 34*2139c9c8SVarun Wadekar addr_high = (uintptr_t)(((uintptr_t)&tegra_secure_entrypoint >> 32U) & 0x7ffU); 35b47d97b3SVarun Wadekar 36b47d97b3SVarun Wadekar /* save reset vector to be used during SYSTEM_SUSPEND exit */ 37601a8e54SSteven Kao mmio_write_32(TEGRA_SCRATCH_BASE + SCRATCH_RESET_VECTOR_LO, 38b47d97b3SVarun Wadekar addr_low); 39601a8e54SSteven Kao mmio_write_32(TEGRA_SCRATCH_BASE + SCRATCH_RESET_VECTOR_HI, 40b47d97b3SVarun Wadekar addr_high); 413cf3183fSVarun Wadekar } 42