Searched hist:af65cbb9549765917cf79ab0a819fe58773882ab (Results 1 – 3 of 3) sorted by relevance
| /rk3399_ARM-atf/lib/cpus/aarch64/ |
| H A D | cortex_x4.S | af65cbb9549765917cf79ab0a819fe58773882ab Mon May 20 18:48:19 UTC 2024 Sona Mathew <sonarebecca.mathew@arm.com> fix(cpus): workaround for CVE-2024-5660 for Cortex-X4
Implements mitigation for CVE-2024-5660 that affects Cortex-X4
revisions r0p0, r0p1, r0p2.
The workaround is to disable the hardware page aggregation at
EL3 by setting CPUECTLR_EL1[46] = 1'b1.
Public Documentation:
https://developer.arm.com/Arm%20Security%20Center/Arm%20CPU%20Vulnerability%20CVE-2024-5660
Change-Id: I378cb4978919cced03e7febc2ad431c572eac72d
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
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| /rk3399_ARM-atf/docs/design/ |
| H A D | cpu-specific-build-macros.rst | af65cbb9549765917cf79ab0a819fe58773882ab Mon May 20 18:48:19 UTC 2024 Sona Mathew <sonarebecca.mathew@arm.com> fix(cpus): workaround for CVE-2024-5660 for Cortex-X4
Implements mitigation for CVE-2024-5660 that affects Cortex-X4
revisions r0p0, r0p1, r0p2.
The workaround is to disable the hardware page aggregation at
EL3 by setting CPUECTLR_EL1[46] = 1'b1.
Public Documentation:
https://developer.arm.com/Arm%20Security%20Center/Arm%20CPU%20Vulnerability%20CVE-2024-5660
Change-Id: I378cb4978919cced03e7febc2ad431c572eac72d
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
|
| /rk3399_ARM-atf/lib/cpus/ |
| H A D | cpu-ops.mk | af65cbb9549765917cf79ab0a819fe58773882ab Mon May 20 18:48:19 UTC 2024 Sona Mathew <sonarebecca.mathew@arm.com> fix(cpus): workaround for CVE-2024-5660 for Cortex-X4
Implements mitigation for CVE-2024-5660 that affects Cortex-X4
revisions r0p0, r0p1, r0p2.
The workaround is to disable the hardware page aggregation at
EL3 by setting CPUECTLR_EL1[46] = 1'b1.
Public Documentation:
https://developer.arm.com/Arm%20Security%20Center/Arm%20CPU%20Vulnerability%20CVE-2024-5660
Change-Id: I378cb4978919cced03e7febc2ad431c572eac72d
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
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