Searched hist:"9 cf7f355ce8984a4cde970d5f57c913d5247ca6d" (Results 1 – 6 of 6) sorted by relevance
| /rk3399_ARM-atf/include/arch/aarch32/ |
| H A D | arch_helpers.h | 9cf7f355ce8984a4cde970d5f57c913d5247ca6d Wed Oct 30 19:24:39 UTC 2019 Madhukar Pappireddy <madhukar.pappireddy@arm.com> Provide a hint to power controller for DSU cluster power down
By writing 0 to CLUSTERPWRDN DSU register bit 0, we send an
advisory to the power controller that cluster power is not required
when all cores are powered down.
The AArch32 CLUSTERPWRDN register is architecturally mapped to the
AArch64 CLUSTERPWRDN_EL1 register
Change-Id: Ie6e67c1c7d811fa25c51e2e405ca7f59bd20c81b
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
|
| H A D | arch.h | 9cf7f355ce8984a4cde970d5f57c913d5247ca6d Wed Oct 30 19:24:39 UTC 2019 Madhukar Pappireddy <madhukar.pappireddy@arm.com> Provide a hint to power controller for DSU cluster power down
By writing 0 to CLUSTERPWRDN DSU register bit 0, we send an
advisory to the power controller that cluster power is not required
when all cores are powered down.
The AArch32 CLUSTERPWRDN register is architecturally mapped to the
AArch64 CLUSTERPWRDN_EL1 register
Change-Id: Ie6e67c1c7d811fa25c51e2e405ca7f59bd20c81b
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
|
| /rk3399_ARM-atf/plat/arm/css/common/ |
| H A D | css_pm.c | 3209b35d2a372e71b96f3efbd7631d32518dc9b7 Wed Sep 13 12:56:39 UTC 2023 Manish Pandey <manish.pandey2@arm.com> fix(plat/arm): do not program DSU CLUSTERPWRDN register
This reverts commit 9cf7f355ce8984a4cde970d5f57c913d5247ca6d.
Above mentioned commit was writing to cluster power required bit of
CLUSTERPWRDN register, which provides an advisory status to the power
controller.
Bit definition indication:
0 : Cluster power is not required when all cores are powered down
1 : Cluster power is required even when all cores are powered down
RESET value of this bit is 0
The current implementation in TF-A just programs this bit to 0 when
cluster power down is done but it never sets it to 1. Which actully
does not change any behaviour as the value of this bit always remains 0.
Ideally this bit has to be set to 1 when a core powers up (as RESET
value is 0) and set it to 0 for any core power down except if its last
man standing, in that case we need to ensure the target power level
from OS is cluster then we can do set it to 0.
There also are some investigation needs to be done to find that whether
we need a explicit message to power controller for turning cluster OFF
or it will happen automatically.
Considering this needs a bit of analysis as well as a platform to test
it on, revert the changes which impact the programming during cluster
power down and just keep register defnition.
Change-Id: I4c4ebedae7ca9cd081fb1e0605b9d906d77614d9
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
9cf7f355ce8984a4cde970d5f57c913d5247ca6d Wed Oct 30 19:24:39 UTC 2019 Madhukar Pappireddy <madhukar.pappireddy@arm.com> Provide a hint to power controller for DSU cluster power down
By writing 0 to CLUSTERPWRDN DSU register bit 0, we send an
advisory to the power controller that cluster power is not required
when all cores are powered down.
The AArch32 CLUSTERPWRDN register is architecturally mapped to the
AArch64 CLUSTERPWRDN_EL1 register
Change-Id: Ie6e67c1c7d811fa25c51e2e405ca7f59bd20c81b
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
|
| /rk3399_ARM-atf/plat/arm/board/fvp/ |
| H A D | fvp_pm.c | 3209b35d2a372e71b96f3efbd7631d32518dc9b7 Wed Sep 13 12:56:39 UTC 2023 Manish Pandey <manish.pandey2@arm.com> fix(plat/arm): do not program DSU CLUSTERPWRDN register
This reverts commit 9cf7f355ce8984a4cde970d5f57c913d5247ca6d.
Above mentioned commit was writing to cluster power required bit of
CLUSTERPWRDN register, which provides an advisory status to the power
controller.
Bit definition indication:
0 : Cluster power is not required when all cores are powered down
1 : Cluster power is required even when all cores are powered down
RESET value of this bit is 0
The current implementation in TF-A just programs this bit to 0 when
cluster power down is done but it never sets it to 1. Which actully
does not change any behaviour as the value of this bit always remains 0.
Ideally this bit has to be set to 1 when a core powers up (as RESET
value is 0) and set it to 0 for any core power down except if its last
man standing, in that case we need to ensure the target power level
from OS is cluster then we can do set it to 0.
There also are some investigation needs to be done to find that whether
we need a explicit message to power controller for turning cluster OFF
or it will happen automatically.
Considering this needs a bit of analysis as well as a platform to test
it on, revert the changes which impact the programming during cluster
power down and just keep register defnition.
Change-Id: I4c4ebedae7ca9cd081fb1e0605b9d906d77614d9
Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
9cf7f355ce8984a4cde970d5f57c913d5247ca6d Wed Oct 30 19:24:39 UTC 2019 Madhukar Pappireddy <madhukar.pappireddy@arm.com> Provide a hint to power controller for DSU cluster power down
By writing 0 to CLUSTERPWRDN DSU register bit 0, we send an
advisory to the power controller that cluster power is not required
when all cores are powered down.
The AArch32 CLUSTERPWRDN register is architecturally mapped to the
AArch64 CLUSTERPWRDN_EL1 register
Change-Id: Ie6e67c1c7d811fa25c51e2e405ca7f59bd20c81b
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
|
| /rk3399_ARM-atf/include/arch/aarch64/ |
| H A D | arch_helpers.h | 9cf7f355ce8984a4cde970d5f57c913d5247ca6d Wed Oct 30 19:24:39 UTC 2019 Madhukar Pappireddy <madhukar.pappireddy@arm.com> Provide a hint to power controller for DSU cluster power down
By writing 0 to CLUSTERPWRDN DSU register bit 0, we send an
advisory to the power controller that cluster power is not required
when all cores are powered down.
The AArch32 CLUSTERPWRDN register is architecturally mapped to the
AArch64 CLUSTERPWRDN_EL1 register
Change-Id: Ie6e67c1c7d811fa25c51e2e405ca7f59bd20c81b
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
|
| H A D | arch.h | 9cf7f355ce8984a4cde970d5f57c913d5247ca6d Wed Oct 30 19:24:39 UTC 2019 Madhukar Pappireddy <madhukar.pappireddy@arm.com> Provide a hint to power controller for DSU cluster power down
By writing 0 to CLUSTERPWRDN DSU register bit 0, we send an
advisory to the power controller that cluster power is not required
when all cores are powered down.
The AArch32 CLUSTERPWRDN register is architecturally mapped to the
AArch64 CLUSTERPWRDN_EL1 register
Change-Id: Ie6e67c1c7d811fa25c51e2e405ca7f59bd20c81b
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
|