Searched hist:"964 e5ff1846c2aecb1257686ee57909c69b1fcb3" (Results 1 – 1 of 1) sorted by relevance
| /rk3399_ARM-atf/drivers/st/clk/ |
| H A D | stm32mp1_clk.c | 964e5ff1846c2aecb1257686ee57909c69b1fcb3 Wed Nov 13 10:46:31 UTC 2019 Nicolas Le Bayon <nicolas.le.bayon@st.com> refactor(st-clock): improve DT parsing for PLL nodes
Add a function to get PLL settings from DT:
"cfg" property is mandatory, an error is generated if not found.
"frac" is optional, default value is returned if not found.
"csg" is optional too, a boolean value indicates if it has been
found, and its value is updated.
Store each PLL node validity information, this avoids parsing DT
several times.
Change-Id: I039466fbe1e67d160f7112814e7bb63b661804d0
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
|