Searched hist:"942013 e1dd57429432cd71cfe121d702e3c52465" (Results 1 – 2 of 2) sorted by relevance
| /rk3399_ARM-atf/include/lib/cpus/aarch64/ |
| H A D | neoverse_n1.h | 942013e1dd57429432cd71cfe121d702e3c52465 Wed Feb 05 05:57:57 UTC 2020 Pramod Kumar <pramod.kumar@broadcom.com> lib: cpu: Check SCU presence in DSU before accessing DSU registers
The DSU contains system control registers in the SCU and L3 logic to
control the functionality of the cluster. If "DIRECT CONNECT" L3
memory system variant is used, there won't be any L3 cache,
snoop filter, and SCU logic present hence no system control register
will be present. Hence check SCU presence before accessing DSU register
for DSU_936184 errata.
Signed-off-by: Pramod Kumar <pramod.kumar@broadcom.com>
Change-Id: I1ffa8afb0447ae3bd1032c9dd678d68021fe5a63
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| /rk3399_ARM-atf/lib/cpus/aarch64/ |
| H A D | neoverse_n1.S | 942013e1dd57429432cd71cfe121d702e3c52465 Wed Feb 05 05:57:57 UTC 2020 Pramod Kumar <pramod.kumar@broadcom.com> lib: cpu: Check SCU presence in DSU before accessing DSU registers
The DSU contains system control registers in the SCU and L3 logic to
control the functionality of the cluster. If "DIRECT CONNECT" L3
memory system variant is used, there won't be any L3 cache,
snoop filter, and SCU logic present hence no system control register
will be present. Hence check SCU presence before accessing DSU register
for DSU_936184 errata.
Signed-off-by: Pramod Kumar <pramod.kumar@broadcom.com>
Change-Id: I1ffa8afb0447ae3bd1032c9dd678d68021fe5a63
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