Searched hist:"6 aa5d1b3ab7b29c85ffe05942f2991da869e7fed" (Results 1 – 2 of 2) sorted by relevance
| /rk3399_ARM-atf/include/lib/cpus/aarch64/ |
| H A D | neoverse_v2.h | 6aa5d1b3ab7b29c85ffe05942f2991da869e7fed Tue May 07 04:26:38 UTC 2024 Younghyun Park <younghyunpark@google.com> feat(cpus): support to update External LLC presence in Neoverse V2
The CPUECTLR_EL1.EXTLLC bit indicates that an external last level
cache(LLC) is present in the system. The default value is internal LLC.
Some systems which may have External LLC can enable the External LLC
presece with new build option 'NEOVERSE_Vx_EXTERNAL_LLC'.
Change-Id: I740947f1ef78e31626dc5b96f6d6dc6658d0120f
Signed-off-by: Younghyun Park <younghyunpark@google.com>
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| /rk3399_ARM-atf/lib/cpus/aarch64/ |
| H A D | neoverse_v2.S | 6aa5d1b3ab7b29c85ffe05942f2991da869e7fed Tue May 07 04:26:38 UTC 2024 Younghyun Park <younghyunpark@google.com> feat(cpus): support to update External LLC presence in Neoverse V2
The CPUECTLR_EL1.EXTLLC bit indicates that an external last level
cache(LLC) is present in the system. The default value is internal LLC.
Some systems which may have External LLC can enable the External LLC
presece with new build option 'NEOVERSE_Vx_EXTERNAL_LLC'.
Change-Id: I740947f1ef78e31626dc5b96f6d6dc6658d0120f
Signed-off-by: Younghyun Park <younghyunpark@google.com>
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