Searched hist:"515 d2d46a318fa3c4c172491c6408c032e6a6b15" (Results 1 – 2 of 2) sorted by relevance
| /rk3399_ARM-atf/common/ |
| H A D | feat_detect.c | 515d2d46a318fa3c4c172491c6408c032e6a6b15 Thu Mar 07 17:40:55 UTC 2024 Andre Przywara <andre.przywara@arm.com> feat(cpufeat): upgrade PMU to v8 (FEATURE_DETECTION)
The ARMv8 ARM J.a describes the ID_AA64DFR0_EL1.PMUver field as allowing
a maximum version number of 8 now. The added features extend the Common
event number space and clarify on some UNPREDICTABLE behaviour.
None of this affects TF-A or any system registers, so just increase the
maximum known version number to let the FEATURE_DETECTION test pass on
ARMv8.8 implementations.
Change-Id: Icab48630c1635bcd78a710b443f0db01b8ff7c9b
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| /rk3399_ARM-atf/include/arch/aarch64/ |
| H A D | arch.h | 515d2d46a318fa3c4c172491c6408c032e6a6b15 Thu Mar 07 17:40:55 UTC 2024 Andre Przywara <andre.przywara@arm.com> feat(cpufeat): upgrade PMU to v8 (FEATURE_DETECTION)
The ARMv8 ARM J.a describes the ID_AA64DFR0_EL1.PMUver field as allowing
a maximum version number of 8 now. The added features extend the Common
event number space and clarify on some UNPREDICTABLE behaviour.
None of this affects TF-A or any system registers, so just increase the
maximum known version number to let the FEATURE_DETECTION test pass on
ARMv8.8 implementations.
Change-Id: Icab48630c1635bcd78a710b443f0db01b8ff7c9b
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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