Searched hist:"40 fd072548ab47ce21bc48dc8059513048693f4e" (Results 1 – 2 of 2) sorted by relevance
| /rk3399_ARM-atf/bl1/aarch64/ |
| H A D | bl1_arch_setup.c | 40fd072548ab47ce21bc48dc8059513048693f4e Thu Apr 24 14:33:24 UTC 2014 Andrew Thoelke <andrew.thoelke@arm.com> Set processor endianness immediately after RESET
SCTLR_EL3.EE is being configured too late in bl1_arch_setup() and
bl31_arch_setup() after data accesses have already occured on
the cold and warm boot paths.
This control bit must be configured immediately on CPU reset to
match the endian state of the firmware (little endian).
Fixes ARM-software/tf-issues#145
Change-Id: Ie12e46fbbed6baf024c30beb50751591bb8c8655
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| H A D | bl1_entrypoint.S | 40fd072548ab47ce21bc48dc8059513048693f4e Thu Apr 24 14:33:24 UTC 2014 Andrew Thoelke <andrew.thoelke@arm.com> Set processor endianness immediately after RESET
SCTLR_EL3.EE is being configured too late in bl1_arch_setup() and
bl31_arch_setup() after data accesses have already occured on
the cold and warm boot paths.
This control bit must be configured immediately on CPU reset to
match the endian state of the firmware (little endian).
Fixes ARM-software/tf-issues#145
Change-Id: Ie12e46fbbed6baf024c30beb50751591bb8c8655
|