Searched hist:"3339 cc42a5dab237e560e75f2e6df6b84e1b10cc" (Results 1 – 6 of 6) sorted by relevance
| /rkbin/RKBOOT/ |
| H A D | RK3588MINIALL_PCIE_EP.ini | 3339cc42a5dab237e560e75f2e6df6b84e1b10cc Tue Apr 09 03:24:19 UTC 2024 YouMin Chen <cym@rock-chips.com> rk3588: ddr: update ddrbin to v1.17
build from:
3488111f83 dram_init: rk3588: update to v1.17
update feature:
1. Fixed the error of pll_id setting when boot_fsp!=0.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Change-Id: I787d8b5025ca67c02bc097d48cd3fce6ff432ce8
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| H A D | RK3588MINIALL_RAMBOOT.ini | 3339cc42a5dab237e560e75f2e6df6b84e1b10cc Tue Apr 09 03:24:19 UTC 2024 YouMin Chen <cym@rock-chips.com> rk3588: ddr: update ddrbin to v1.17
build from:
3488111f83 dram_init: rk3588: update to v1.17
update feature:
1. Fixed the error of pll_id setting when boot_fsp!=0.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Change-Id: I787d8b5025ca67c02bc097d48cd3fce6ff432ce8
|
| H A D | RK3588MINIALL_IPC.ini | 3339cc42a5dab237e560e75f2e6df6b84e1b10cc Tue Apr 09 03:24:19 UTC 2024 YouMin Chen <cym@rock-chips.com> rk3588: ddr: update ddrbin to v1.17
build from:
3488111f83 dram_init: rk3588: update to v1.17
update feature:
1. Fixed the error of pll_id setting when boot_fsp!=0.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Change-Id: I787d8b5025ca67c02bc097d48cd3fce6ff432ce8
|
| H A D | RK3588MINIALL.ini | 3339cc42a5dab237e560e75f2e6df6b84e1b10cc Tue Apr 09 03:24:19 UTC 2024 YouMin Chen <cym@rock-chips.com> rk3588: ddr: update ddrbin to v1.17
build from:
3488111f83 dram_init: rk3588: update to v1.17
update feature:
1. Fixed the error of pll_id setting when boot_fsp!=0.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Change-Id: I787d8b5025ca67c02bc097d48cd3fce6ff432ce8
|
| /rkbin/doc/release/ |
| H A D | RK3588_CN.md | 3339cc42a5dab237e560e75f2e6df6b84e1b10cc Tue Apr 09 03:24:19 UTC 2024 YouMin Chen <cym@rock-chips.com> rk3588: ddr: update ddrbin to v1.17
build from:
3488111f83 dram_init: rk3588: update to v1.17
update feature:
1. Fixed the error of pll_id setting when boot_fsp!=0.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Change-Id: I787d8b5025ca67c02bc097d48cd3fce6ff432ce8
|
| H A D | RK3588_EN.md | 3339cc42a5dab237e560e75f2e6df6b84e1b10cc Tue Apr 09 03:24:19 UTC 2024 YouMin Chen <cym@rock-chips.com> rk3588: ddr: update ddrbin to v1.17
build from:
3488111f83 dram_init: rk3588: update to v1.17
update feature:
1. Fixed the error of pll_id setting when boot_fsp!=0.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Change-Id: I787d8b5025ca67c02bc097d48cd3fce6ff432ce8
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