rk3588: ddr: update ddrbin to v1.19

build from:
ff1a08bde6 dram_init: rk3588: update ddrbin to v1.19

update feature:
Add RK3588 -B/RK3588S-B/RK3588S2-B support

Signed-off-by: Tang Yun ping <typ@

rk3588: ddr: update ddrbin to v1.19

build from:
ff1a08bde6 dram_init: rk3588: update ddrbin to v1.19

update feature:
Add RK3588 -B/RK3588S-B/RK3588S2-B support

Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: I6de975f7ce823e4cc76f50a41780e525bad85f2e

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rk3588: ddr: update ddr bin to v1.18

Build from:
9fa84341ce dram_init: rk3588: update tx eye margin

Update features:
1. Add dvfs/periodic training to improve write signal margin.
2. Support mixe

rk3588: ddr: update ddr bin to v1.18

Build from:
9fa84341ce dram_init: rk3588: update tx eye margin

Update features:
1. Add dvfs/periodic training to improve write signal margin.
2. Support mixed package DRAM.

Warn:
BL31 should be update to V1.47 or above.

Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: I14928c3b33ab6a0468f1d4b150c0e7025f04d48b

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rk3588: ddr: update ddrbin to v1.17

build from:
3488111f83 dram_init: rk3588: update to v1.17
update feature:
1. Fixed the error of pll_id setting when boot_fsp!=0.

Signed-off-by: Y

rk3588: ddr: update ddrbin to v1.17

build from:
3488111f83 dram_init: rk3588: update to v1.17
update feature:
1. Fixed the error of pll_id setting when boot_fsp!=0.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Change-Id: I787d8b5025ca67c02bc097d48cd3fce6ff432ce8

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rk3588: ddr: update ddrbin to v1.16

build from:
9fffbe1e78 rk3588: ddr: adjust hash description
update feature:
1. Modify the LPDDR5 frequency to improve stability.
2. Add su

rk3588: ddr: update ddrbin to v1.16

build from:
9fffbe1e78 rk3588: ddr: adjust hash description
update feature:
1. Modify the LPDDR5 frequency to improve stability.
2. Add support dram with CS0 capacity less than CS1 capacity.
3. Modify the DERATEINT.mr4_read_interval configuration.
4. Fixed derate issue with LPDDR5 of one rank.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Change-Id: Id6f200c8ed9ec4f71f79b8050608cb928658a276

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rk3588: ddr: update ddrbin to v1.15

build from:
d5483af87d rk3588: ddr: update to v1.15
update feature:
1. avoid PHY skew value greater than dll lock value
2. fix the data tr

rk3588: ddr: update ddrbin to v1.15

build from:
d5483af87d rk3588: ddr: update to v1.15
update feature:
1. avoid PHY skew value greater than dll lock value
2. fix the data training process
3. resume ZQ background calibration for LPDDR5

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Change-Id: I5857feb0a51e13d432f5bc8026263f4b57a64d6d

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rk3588: ddr: update ddrbin to v1.14

build from:
73dffea49e rk3588: ddr: update to v1.14
update feature:
1. fix lp5 vref trn bug.
2. add fwver tags support.

Signed-off-by: Tang Yun ping <typ@rock

rk3588: ddr: update ddrbin to v1.14

build from:
73dffea49e rk3588: ddr: update to v1.14
update feature:
1. fix lp5 vref trn bug.
2. add fwver tags support.

Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: I326297b1e9c9f46fb77ad190ac6b943fbaf1eff6

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rk3588: ddr: update ddrbin to v1.13

build from:
25cee80c4f rk3588: ddr: fix LPDDR5 528MHz write training issue
update feature:
1. fix LPDDR5 528MHz write training issue
2. fsp_param upda

rk3588: ddr: update ddrbin to v1.13

build from:
25cee80c4f rk3588: ddr: fix LPDDR5 528MHz write training issue
update feature:
1. fix LPDDR5 528MHz write training issue
2. fsp_param update vref_inner for each channel
3. Support both per-bank refresh and derating enabled

Note: BL31 should be update to V1.41

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Change-Id: I78f0d2ab4f10b71330ce677c4f6ae0d31d982ef2

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rk3588: ddr: update ddrbin to v1.12

build from:
52218f4949 rk3588: ddr: add support print_train_result and print_mr

update feature:
1. Add support print_train_result and print_mr
1. Fixed init f

rk3588: ddr: update ddrbin to v1.12

build from:
52218f4949 rk3588: ddr: add support print_train_result and print_mr

update feature:
1. Add support print_train_result and print_mr
1. Fixed init fail issue that max freq between 1066-1600MHz.
2. Fixed the issue panic in ddrbin caused by multiple initialization of DDR.

Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Change-Id: I6fd0bf78a17321ebf2a58608e6fbc173bc895c5b

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rk3588: ddr: update ddrbin to v1.11

build from:
f1474cf52f rk3588: ddr: add support spread spectrum mode

update feature:
1. Added more print info when initialization fails to help locate
solderin

rk3588: ddr: update ddrbin to v1.11

build from:
f1474cf52f rk3588: ddr: add support spread spectrum mode

update feature:
1. Added more print info when initialization fails to help locate
soldering issues.
2. Optimizing boot time.
3. enable per bank refresh function.
4. LPDDR5 4 channels use different write vref values to improve
stability.
5. First init LPDDR4x.
6. LPDDR5 cavref update to 36%.
7. Add support spread spectrum mode.

Note: BL31 should be update to V1.38

Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: Ie822436500e3d778ba8787e7155e561091d1d997

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RKBOOT: Correct .ini file contents

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ie2d0d9e5eaa1a03e990eed60839dacf82628154e

rk3588: ddr: update ddrbin to v1.09

build from:
a930779e06 rk3588: ddr: update ddrbin to v1.09

update feature:
1c278addf8 rk3588: ddr: lp4 support R17
1faa08ee32 rk3588: ddr: fix WRTRN_CYC_MODE

rk3588: ddr: update ddrbin to v1.09

build from:
a930779e06 rk3588: ddr: update ddrbin to v1.09

update feature:
1c278addf8 rk3588: ddr: lp4 support R17
1faa08ee32 rk3588: ddr: fix WRTRN_CYC_MODE bug
ef786d4bd1 rk3588: ddr: support LP5 byte mode
aff256a558 rk3588: ddr: enable LP5 DMC
0f17dc5b27 rk3588: ddr: add power_save_setting for gating some unuse clock
649abbc98b rk3588: ddr: Improve lp5 performance
cef3d77e31 rk3588: ddr: set ZQSET1TMG1.t_zq_short_interval_x1024 to 0xf0000
22f7ef4327 rk3588: ddr: boot FSP configurable by tools
7498eb52b7 rk3588: ddr: enable pstore
e2cb912b2a rk3588: ddr: clean sw*de-skew bef set rate
5be1ea1689 rk3588: ddr: adjust rk3588 LPDDR5 timing
2ccd9c35f6 rk3588: ddr: derate/per_bk_ref configurable by tools
526cc06f5b rk3588: ddr: enable lp4 lp4x cs1 ODT
149366e266 rk3588: ddr: add 256MB reg space recycle
c0cdba1f6f rk3588: ddr: LP5 WCK_ODT use 40ohm, CA ODT 80ohm

Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: I466ad2e0537313119f2f678ed3745207c498a6b3

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RKBOOT/RKTRUST/bin: Set file mode 644

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I3fa512e2cfa636800ef15907c53aae24cd599967

rk3588: ddr: update ddr bin to v1.08

build from:
06ece1180d rk3588: ddr: update ddr bin to v1.08

build command:
./make.sh rk3588

update feature:
1. enable prbs training
2. enable vref a

rk3588: ddr: update ddr bin to v1.08

build from:
06ece1180d rk3588: ddr: update ddr bin to v1.08

build command:
./make.sh rk3588

update feature:
1. enable prbs training
2. enable vref auto training
3. fix rx vref bug

Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: I6ce5d14ff9f0fe52cb2cdf50817bf05859e10737

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rk3588: ddr: update ddr bin to v1.07

build from:
f66a4eb902 rk3588: ddr: update ddr bin to v1.07
build command:
./make.sh rk3588

update feature:
a584300255 rk3588: ddr: disable per bank refresh

rk3588: ddr: update ddr bin to v1.07

build from:
f66a4eb902 rk3588: ddr: update ddr bin to v1.07
build command:
./make.sh rk3588

update feature:
a584300255 rk3588: ddr: disable per bank refresh
3cc11fcb80 rk3588: ddr: fix low freq WRTRN BUG
abd1ff57fa rk3588: ddr: fix lp4/4x byte mode zqcal bug and rd_per_rank_en config
0304fc94a9 rk3588: ddr: enable PCL_PD to saving power
d8d1daacc7 rk3588: ddr: config sr_idle for FSP1/2/3
fec88154df rk3588: ddr: add override mdll lock result in sdram_init_detect
59a71d80d9 rk3588: ddr: clear SW_* after SW write training code update done
5a9eccb98d rk3588: ddr: add vref scan
07f12e003a rk3588: ddr: fix eye scan code bug
e93a13b34b rk3588: ddr: hash_rank_mask set to 0 when ddrconf < 4
99b2bed1a6 rk3588: ddr: lpddr5 ddrconf choose "G" at bit5
056fce2e98 rk3588: ddr: fix cs detect bug
d307d605b1 rk3588: ddr: enable derate after pctl_modify_trfc
b5be2ab9ae rk3588: ddr: add support lpddr5 ddr frequency scan
7bf7ad694f rk3588: ddr: clrbit DVFS_CON.per_dvfs_train_disable in ddr_set_rate
5f9c6b011d rk3588: ddr: fix lpddr4/4x trfc calculate bug
e7723f15ae rk3588: ddr: fix SD boot bug

Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: Ice389ab8e21e19636356d1d9cf4123624adf3992

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rk3588: loader: add dram boot via usb

Build from rk_boot_all commit:
c7de69a67: rk3326s: add usb phy tuning

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: If7ca4dd183f659d749c4

rk3588: loader: add dram boot via usb

Build from rk_boot_all commit:
c7de69a67: rk3326s: add usb phy tuning

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: If7ca4dd183f659d749c4d2a142cc6179e0d7a29a

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